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https://github.com/c64scene-ar/llvm-6502.git
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410ca67ab2
- Copy patterns with float/double types are enough. - Fix typos in test case names that were using v1fx. - There is no ACLE intrinsic that uses v1f32 type. And there is no conflict of neon and non-neon ovelapped operations with this type, so there is no need to support operations with this type. - Remove v1f32 from FPR32 register and disallow v1f32 as a legal type for operations. Patch by Ana Pazos! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197159 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmParser | ||
Disassembler | ||
InstPrinter | ||
MCTargetDesc | ||
TargetInfo | ||
Utils | ||
AArch64.h | ||
AArch64.td | ||
AArch64AsmPrinter.cpp | ||
AArch64AsmPrinter.h | ||
AArch64BranchFixupPass.cpp | ||
AArch64CallingConv.td | ||
AArch64FrameLowering.cpp | ||
AArch64FrameLowering.h | ||
AArch64InstrFormats.td | ||
AArch64InstrInfo.cpp | ||
AArch64InstrInfo.h | ||
AArch64InstrInfo.td | ||
AArch64InstrNEON.td | ||
AArch64ISelDAGToDAG.cpp | ||
AArch64ISelLowering.cpp | ||
AArch64ISelLowering.h | ||
AArch64MachineFunctionInfo.cpp | ||
AArch64MachineFunctionInfo.h | ||
AArch64MCInstLower.cpp | ||
AArch64RegisterInfo.cpp | ||
AArch64RegisterInfo.h | ||
AArch64RegisterInfo.td | ||
AArch64Schedule.td | ||
AArch64SelectionDAGInfo.cpp | ||
AArch64SelectionDAGInfo.h | ||
AArch64Subtarget.cpp | ||
AArch64Subtarget.h | ||
AArch64TargetMachine.cpp | ||
AArch64TargetMachine.h | ||
AArch64TargetObjectFile.cpp | ||
AArch64TargetObjectFile.h | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile | ||
README.txt |
This file will contain changes that need to be made before AArch64 can become an officially supported target. Currently a placeholder.