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4a76317ebb
The included test case would fail, because the MI PHI node would have two operands from the same predecessor. This problem occurs when a switch instruction couldn't be selected. This happens always, because there is no default switch support for FastISel to begin with. The problem was that FastISel would first add the operand to the PHI nodes and then fall-back to SelectionDAG, which would then in turn add the same operands to the PHI nodes again. This fix removes these duplicate PHI node operands by reseting the PHINodesToUpdate to its original state before FastISel tried to select the instruction. This fixes <rdar://problem/18155224>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216640 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
573 B
LLVM
27 lines
573 B
LLVM
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s
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; REQUIRES: asserts
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; Test that the Machine Instruction PHI node doesn't have more than one operand
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; from the same predecessor.
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define i32 @foo(i32 %a, i32 %b, i1 %c) {
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entry:
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br i1 %c, label %switch, label %direct
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switch:
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switch i32 %a, label %exit [
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i32 43, label %continue
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i32 45, label %continue
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]
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direct:
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%var = add i32 %b, 1
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br label %continue
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continue:
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%var.phi = phi i32 [ %var, %direct ], [ 0, %switch ], [ 0, %switch ]
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ret i32 %var.phi
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exit:
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ret i32 1
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}
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