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https://github.com/c64scene-ar/llvm-6502.git
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Changed cout to DOUT, and TODOs to FIXMEs. Other changes as per coding conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51105 91177308-0d34-0410-b5e6-96231b3b80d8
221 lines
6.3 KiB
C++
221 lines
6.3 KiB
C++
//===- PIC16RegisterInfo.cpp - PIC16 Register Information -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PIC16 implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-reg-info"
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#include "PIC16.h"
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#include "PIC16RegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/Type.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLocation.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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// FIXME: add subtarget support.
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PIC16RegisterInfo::PIC16RegisterInfo(const TargetInstrInfo &tii)
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: PIC16GenRegisterInfo(PIC16::ADJCALLSTACKDOWN, PIC16::ADJCALLSTACKUP),
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TII(tii) {}
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// PIC16::RA, return the number that it corresponds to (e.g. 31).
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unsigned PIC16RegisterInfo::
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getRegisterNumbering(unsigned RegEnum)
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{
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assert (RegEnum <= 31 && "Unknown register number!");
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return RegEnum;
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}
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void PIC16RegisterInfo::
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copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const
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{
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return;
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}
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void PIC16RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg,
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const MachineInstr *Orig) const
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{
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MachineInstr *MI = Orig->clone();
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MI->getOperand(0).setReg(DestReg);
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MBB.insert(I, MI);
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}
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MachineInstr *PIC16RegisterInfo::
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foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FI) const
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{
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MachineInstr *NewMI = NULL;
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return NewMI;
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}
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//===----------------------------------------------------------------------===//
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//
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// Callee Saved Registers methods
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//
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//===----------------------------------------------------------------------===//
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/// PIC16 Callee Saved Registers
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const unsigned* PIC16RegisterInfo::
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getCalleeSavedRegs(const MachineFunction *MF) const
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{
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// PIC16 calle-save register range is $16-$26(s0-s7)
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static const unsigned CalleeSavedRegs[] = { 0 };
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return CalleeSavedRegs;
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}
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/// PIC16 Callee Saved Register Classes
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const TargetRegisterClass* const*
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PIC16RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const
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{
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static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
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return CalleeSavedRegClasses;
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}
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BitVector PIC16RegisterInfo::
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getReservedRegs(const MachineFunction &MF) const
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{
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BitVector Reserved(getNumRegs());
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return Reserved;
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}
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//===----------------------------------------------------------------------===//
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//
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// Stack Frame Processing methods
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// +----------------------------+
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//
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// FIXME: Add stack layout description here.
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//
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//
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//===----------------------------------------------------------------------===//
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function has variable sized allocas or
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// if frame pointer elimination is disabled.
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bool PIC16RegisterInfo::
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hasFP(const MachineFunction &MF) const {
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return false;
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}
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// This function eliminate ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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void PIC16RegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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// Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
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MBB.erase(I);
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}
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// FrameIndex represent objects inside a abstract stack.
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// We must replace FrameIndex with an stack/frame pointer
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// direct reference.
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void PIC16RegisterInfo::
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eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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RegScavenger *RS) const
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{
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MachineInstr &MI = *II;
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MachineFunction &MF = *MI.getParent()->getParent();
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unsigned i = 0;
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while (!MI.getOperand(i).isFrameIndex()) {
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++i;
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assert(i < MI.getNumOperands() &&
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"Instr doesn't have FrameIndex operand!");
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}
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int FrameIndex = MI.getOperand(i).getIndex();
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int stackSize = MF.getFrameInfo()->getStackSize();
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int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
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DOUT << "<--------->\n";
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#ifndef NDEBUG
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MI.print(DOUT);
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#endif
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DOUT << "FrameIndex : " << FrameIndex << "\n";
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DOUT << "spOffset : " << spOffset << "\n";
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DOUT << "stackSize : " << stackSize << "\n";
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// As explained on LowerFORMAL_ARGUMENTS, detect negative offsets
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// and adjust SPOffsets considering the final stack size.
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int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset));
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DOUT << "Offset : " << Offset << "\n";
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DOUT << "<--------->\n";
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// MI.getOperand(i+1).ChangeToImmediate(Offset);
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MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
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}
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void PIC16RegisterInfo::
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emitPrologue(MachineFunction &MF) const
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{
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}
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void PIC16RegisterInfo::
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emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
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{
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}
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void PIC16RegisterInfo::
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processFunctionBeforeFrameFinalized(MachineFunction &MF) const
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{
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}
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unsigned PIC16RegisterInfo::
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getRARegister() const {
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assert(0 && "What is the return address register");
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return 0;
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}
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unsigned PIC16RegisterInfo::
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getFrameRegister(MachineFunction &MF) const {
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return PIC16::STKPTR;
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}
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unsigned PIC16RegisterInfo::
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getEHExceptionRegister() const {
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assert(0 && "What is the exception register");
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return 0;
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}
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unsigned PIC16RegisterInfo::
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getEHHandlerRegister() const {
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assert(0 && "What is the exception handler register");
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return 0;
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}
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int PIC16RegisterInfo::
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getDwarfRegNum(unsigned RegNum, bool isEH) const {
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assert(0 && "What is the dwarf register number");
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return -1;
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}
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#include "PIC16GenRegisterInfo.inc"
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