mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
ac79e4c82f
also fix the encoding of the later. - Add a new encoding bit to describe the index mode used in AM3. - Teach printAddrMode3Operand to check by the addressing mode which index mode to print. - Testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128832 91177308-0d34-0410-b5e6-96231b3b80d8
124 lines
5.8 KiB
C++
124 lines
5.8 KiB
C++
//===-- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax ----------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This class prints an ARM MCInst to a .s file.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef ARMINSTPRINTER_H
|
|
#define ARMINSTPRINTER_H
|
|
|
|
#include "llvm/MC/MCInstPrinter.h"
|
|
|
|
namespace llvm {
|
|
|
|
class MCOperand;
|
|
class TargetMachine;
|
|
|
|
class ARMInstPrinter : public MCInstPrinter {
|
|
public:
|
|
ARMInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
|
|
: MCInstPrinter(MAI) {}
|
|
|
|
virtual void printInst(const MCInst *MI, raw_ostream &O);
|
|
virtual StringRef getOpcodeName(unsigned Opcode) const;
|
|
virtual StringRef getRegName(unsigned RegNo) const;
|
|
|
|
static const char *getInstructionName(unsigned Opcode);
|
|
|
|
// Autogenerated by tblgen.
|
|
void printInstruction(const MCInst *MI, raw_ostream &O);
|
|
static const char *getRegisterName(unsigned RegNo);
|
|
|
|
|
|
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
|
|
|
|
void printSOImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
|
|
void printSORegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
|
|
void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
|
|
void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAM3PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
|
|
void printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAddrMode7Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
|
|
void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
|
|
void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printThumbAddrModeImm5SOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O, unsigned Scale);
|
|
void printThumbAddrModeImm5S1Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printThumbAddrModeImm5S2Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printThumbAddrModeImm5S4Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printThumbAddrModeSPOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
|
|
void printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
|
|
void printSetendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printCPSIMod(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printCPSIFlag(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printSBitModifierOperand(const MCInst *MI, unsigned OpNum,
|
|
raw_ostream &O);
|
|
void printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printPImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printCImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
void printNEONModImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
|
|
void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|