Matt Arsenault 12bd9f11c0 R600/SI: Remove SI_ADDR64_RSRC ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221382 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-05 19:01:17 +00:00
..
Analysis	remove extra breaks; NFC	2014-11-05 18:00:07 +00:00
AsmParser	X86: Implement the vectorcall calling convention	2014-10-28 01:29:26 +00:00
Bitcode	IR: MDNode => Value: Instruction::getAllMetadataOtherThanDebugLoc()	2014-11-03 18:13:57 +00:00
CodeGen	IR: MDNode => Value: NamedMDNode::getOperator()	2014-11-05 18:16:03 +00:00
DebugInfo
ExecutionEngine	[JIT] Fix some more missing endian conversions in RuntimeDyld	2014-11-01 15:52:31 +00:00
IR	IR: MDNode => Value: NamedMDNode::getOperator()	2014-11-05 18:16:03 +00:00
IRReader
LineEditor
Linker	IR: MDNode => Value: NamedMDNode::getOperator()	2014-11-05 18:16:03 +00:00
LTO
MC	Don't produce relocations for a difference in a section with no symbols.	2014-11-04 22:10:33 +00:00
Object	llvm-readobj: Add support for dumping the DOS header in PE files	2014-11-05 06:24:35 +00:00
Option
ProfileData	Use ErrorOr for the ::create factory on instrumented and sample profilers.	2014-11-03 00:51:45 +00:00
Support	llvm-readobj: Add support for dumping the DOS header in PE files	2014-11-05 06:24:35 +00:00
TableGen
Target	R600/SI: Remove SI_ADDR64_RSRC	2014-11-05 19:01:17 +00:00
Transforms	IR: MDNode => Value: NamedMDNode::getOperator()	2014-11-05 18:16:03 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile