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https://github.com/c64scene-ar/llvm-6502.git
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e2cf37b88c
starting in getCurrentFunctionEHName. Among other problems, we would try to privative a "foo.eh" label, but end up emitting the label as _Lfoo.eh instead of L_foo.eh on darwin. This is really bad, and the linker has always tolerated these labels existing. For now, just emit them as _foo.eh. This patch also fixes problems with ".eh" labels on unnamed functions and eliminates two strangely defined TargetAsmInfo hooks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76231 91177308-0d34-0410-b5e6-96231b3b80d8
432 lines
14 KiB
C++
432 lines
14 KiB
C++
//===-- X86TargetAsmInfo.cpp - X86 asm properties ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the X86TargetAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "X86TargetAsmInfo.h"
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#include "X86TargetMachine.h"
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#include "X86Subtarget.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/InlineAsm.h"
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#include "llvm/Instructions.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/Module.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/Dwarf.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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using namespace llvm::dwarf;
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const char *const llvm::x86_asm_table[] = {
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"{si}", "S",
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"{di}", "D",
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"{ax}", "a",
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"{cx}", "c",
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"{memory}", "memory",
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"{flags}", "",
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"{dirflag}", "",
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"{fpsr}", "",
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"{cc}", "cc",
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0,0};
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X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM):
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X86TargetAsmInfo<DarwinTargetAsmInfo>(TM) {
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const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
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bool is64Bit = Subtarget->is64Bit();
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AlignmentIsInBytes = false;
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TextAlignFillValue = 0x90;
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if (!is64Bit)
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Data64bitsDirective = 0; // we can't emit a 64-bit unit
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ZeroDirective = "\t.space\t"; // ".space N" emits N zeros.
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ZeroFillDirective = "\t.zerofill\t"; // Uses .zerofill
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if (TM.getRelocationModel() != Reloc::Static)
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ConstantPoolSection = "\t.const_data";
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else
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ConstantPoolSection = "\t.const\n";
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// FIXME: Why don't we always use this section?
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if (is64Bit)
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SixteenByteConstantSection = getUnnamedSection("\t.literal16\n",
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SectionFlags::Mergeable);
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LCOMMDirective = "\t.lcomm\t";
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// Leopard and above support aligned common symbols.
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COMMDirectiveTakesAlignment = (Subtarget->getDarwinVers() >= 9);
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HasDotTypeDotSizeDirective = false;
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if (is64Bit) {
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PersonalityPrefix = "";
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PersonalitySuffix = "+4@GOTPCREL";
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} else {
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PersonalityPrefix = "L";
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PersonalitySuffix = "$non_lazy_ptr";
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}
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InlineAsmStart = "## InlineAsm Start";
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InlineAsmEnd = "## InlineAsm End";
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CommentString = "##";
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SetDirective = "\t.set";
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PCSymbol = ".";
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UsedDirective = "\t.no_dead_strip\t";
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ProtectedDirective = "\t.globl\t";
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SupportsDebugInformation = true;
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DwarfDebugInlineSection = ".section __DWARF,__debug_inlined,regular,debug";
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DwarfUsesInlineInfoSection = true;
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// Exceptions handling
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SupportsExceptionHandling = true;
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GlobalEHDirective = "\t.globl\t";
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SupportsWeakOmittedEHFrame = false;
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AbsoluteEHSectionOffsets = false;
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DwarfEHFrameSection =
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".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support";
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DwarfExceptionSection = ".section __DATA,__gcc_except_tab";
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}
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unsigned
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X86DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
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bool Global) const {
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if (Reason == DwarfEncoding::Functions && Global)
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return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4);
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else if (Reason == DwarfEncoding::CodeLabels || !Global)
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return DW_EH_PE_pcrel;
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else
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return DW_EH_PE_absptr;
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}
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const char *
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X86DarwinTargetAsmInfo::getEHGlobalPrefix() const
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{
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const X86Subtarget* Subtarget = &TM.getSubtarget<X86Subtarget>();
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if (Subtarget->getDarwinVers() > 9)
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return PrivateGlobalPrefix;
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else
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return "";
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}
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X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
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X86TargetAsmInfo<ELFTargetAsmInfo>(TM) {
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CStringSection = ".rodata.str";
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PrivateGlobalPrefix = ".L";
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WeakRefDirective = "\t.weak\t";
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SetDirective = "\t.set\t";
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PCSymbol = ".";
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// Set up DWARF directives
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HasLEB128 = true; // Target asm supports leb128 directives (little-endian)
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// Debug Information
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AbsoluteDebugSectionOffsets = true;
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SupportsDebugInformation = true;
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DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\",@progbits";
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DwarfInfoSection = "\t.section\t.debug_info,\"\",@progbits";
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DwarfLineSection = "\t.section\t.debug_line,\"\",@progbits";
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DwarfFrameSection = "\t.section\t.debug_frame,\"\",@progbits";
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DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"\",@progbits";
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DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"\",@progbits";
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DwarfStrSection = "\t.section\t.debug_str,\"\",@progbits";
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DwarfLocSection = "\t.section\t.debug_loc,\"\",@progbits";
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DwarfARangesSection = "\t.section\t.debug_aranges,\"\",@progbits";
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DwarfRangesSection = "\t.section\t.debug_ranges,\"\",@progbits";
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DwarfMacroInfoSection = "\t.section\t.debug_macinfo,\"\",@progbits";
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// Exceptions handling
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SupportsExceptionHandling = true;
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AbsoluteEHSectionOffsets = false;
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DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\",@progbits";
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DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\",@progbits";
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// On Linux we must declare when we can use a non-executable stack.
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if (TM.getSubtarget<X86Subtarget>().isLinux())
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NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\",@progbits";
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}
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unsigned
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X86ELFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
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bool Global) const {
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CodeModel::Model CM = TM.getCodeModel();
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bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
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if (TM.getRelocationModel() == Reloc::PIC_) {
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unsigned Format = 0;
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if (!is64Bit)
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// 32 bit targets always encode pointers as 4 bytes
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Format = DW_EH_PE_sdata4;
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else {
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// 64 bit targets encode pointers in 4 bytes iff:
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// - code model is small OR
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// - code model is medium and we're emitting externally visible symbols
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// or any code symbols
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if (CM == CodeModel::Small ||
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(CM == CodeModel::Medium && (Global ||
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Reason != DwarfEncoding::Data)))
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Format = DW_EH_PE_sdata4;
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else
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Format = DW_EH_PE_sdata8;
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}
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if (Global)
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Format |= DW_EH_PE_indirect;
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return (Format | DW_EH_PE_pcrel);
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} else {
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if (is64Bit &&
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(CM == CodeModel::Small ||
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(CM == CodeModel::Medium && Reason != DwarfEncoding::Data)))
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return DW_EH_PE_udata4;
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else
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return DW_EH_PE_absptr;
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}
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}
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X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM):
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X86GenericTargetAsmInfo(TM) {
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GlobalPrefix = "_";
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LCOMMDirective = "\t.lcomm\t";
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COMMDirectiveTakesAlignment = false;
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HasDotTypeDotSizeDirective = false;
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HasSingleParameterDotFile = false;
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StaticCtorsSection = "\t.section .ctors,\"aw\"";
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StaticDtorsSection = "\t.section .dtors,\"aw\"";
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HiddenDirective = NULL;
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PrivateGlobalPrefix = "L"; // Prefix for private global symbols
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WeakRefDirective = "\t.weak\t";
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SetDirective = "\t.set\t";
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// Set up DWARF directives
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HasLEB128 = true; // Target asm supports leb128 directives (little-endian)
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AbsoluteDebugSectionOffsets = true;
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AbsoluteEHSectionOffsets = false;
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SupportsDebugInformation = true;
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DwarfSectionOffsetDirective = "\t.secrel32\t";
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DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"dr\"";
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DwarfInfoSection = "\t.section\t.debug_info,\"dr\"";
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DwarfLineSection = "\t.section\t.debug_line,\"dr\"";
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DwarfFrameSection = "\t.section\t.debug_frame,\"dr\"";
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DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"dr\"";
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DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"dr\"";
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DwarfStrSection = "\t.section\t.debug_str,\"dr\"";
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DwarfLocSection = "\t.section\t.debug_loc,\"dr\"";
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DwarfARangesSection = "\t.section\t.debug_aranges,\"dr\"";
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DwarfRangesSection = "\t.section\t.debug_ranges,\"dr\"";
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DwarfMacroInfoSection = "\t.section\t.debug_macinfo,\"dr\"";
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}
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unsigned
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X86COFFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
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bool Global) const {
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CodeModel::Model CM = TM.getCodeModel();
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bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
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if (TM.getRelocationModel() == Reloc::PIC_) {
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unsigned Format = 0;
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if (!is64Bit)
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// 32 bit targets always encode pointers as 4 bytes
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Format = DW_EH_PE_sdata4;
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else {
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// 64 bit targets encode pointers in 4 bytes iff:
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// - code model is small OR
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// - code model is medium and we're emitting externally visible symbols
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// or any code symbols
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if (CM == CodeModel::Small ||
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(CM == CodeModel::Medium && (Global ||
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Reason != DwarfEncoding::Data)))
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Format = DW_EH_PE_sdata4;
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else
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Format = DW_EH_PE_sdata8;
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}
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if (Global)
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Format |= DW_EH_PE_indirect;
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return (Format | DW_EH_PE_pcrel);
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} else {
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if (is64Bit &&
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(CM == CodeModel::Small ||
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(CM == CodeModel::Medium && Reason != DwarfEncoding::Data)))
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return DW_EH_PE_udata4;
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else
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return DW_EH_PE_absptr;
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}
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}
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std::string
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X86COFFTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
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SectionKind::Kind kind) const {
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switch (kind) {
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case SectionKind::Text:
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return ".text$linkonce" + GV->getName();
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case SectionKind::Data:
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case SectionKind::BSS:
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case SectionKind::ThreadData:
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case SectionKind::ThreadBSS:
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return ".data$linkonce" + GV->getName();
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case SectionKind::ROData:
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case SectionKind::RODataMergeConst:
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case SectionKind::RODataMergeStr:
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return ".rdata$linkonce" + GV->getName();
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default:
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llvm_unreachable("Unknown section kind");
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}
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return NULL;
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}
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std::string X86COFFTargetAsmInfo::printSectionFlags(unsigned flags) const {
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std::string Flags = ",\"";
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if (flags & SectionFlags::Code)
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Flags += 'x';
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if (flags & SectionFlags::Writeable)
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Flags += 'w';
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Flags += "\"";
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return Flags;
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}
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X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM):
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X86GenericTargetAsmInfo(TM) {
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GlobalPrefix = "_";
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CommentString = ";";
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InlineAsmStart = "; InlineAsm Start";
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InlineAsmEnd = "; InlineAsm End";
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PrivateGlobalPrefix = "$";
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AlignDirective = "\tALIGN\t";
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ZeroDirective = "\tdb\t";
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ZeroDirectiveSuffix = " dup(0)";
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AsciiDirective = "\tdb\t";
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AscizDirective = 0;
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Data8bitsDirective = "\tdb\t";
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Data16bitsDirective = "\tdw\t";
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Data32bitsDirective = "\tdd\t";
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Data64bitsDirective = "\tdq\t";
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HasDotTypeDotSizeDirective = false;
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HasSingleParameterDotFile = false;
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AlignmentIsInBytes = true;
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TextSection = getUnnamedSection("_text", SectionFlags::Code);
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DataSection = getUnnamedSection("_data", SectionFlags::Writeable);
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JumpTableDataSection = NULL;
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SwitchToSectionDirective = "";
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TextSectionStartSuffix = "\tSEGMENT PARA 'CODE'";
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DataSectionStartSuffix = "\tSEGMENT PARA 'DATA'";
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SectionEndDirectiveSuffix = "\tends\n";
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}
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template <class BaseTAI>
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bool X86TargetAsmInfo<BaseTAI>::LowerToBSwap(CallInst *CI) const {
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// FIXME: this should verify that we are targetting a 486 or better. If not,
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// we will turn this bswap into something that will be lowered to logical ops
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// instead of emitting the bswap asm. For now, we don't support 486 or lower
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// so don't worry about this.
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// Verify this is a simple bswap.
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if (CI->getNumOperands() != 2 ||
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CI->getType() != CI->getOperand(1)->getType() ||
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!CI->getType()->isInteger())
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return false;
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const IntegerType *Ty = dyn_cast<IntegerType>(CI->getType());
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if (!Ty || Ty->getBitWidth() % 16 != 0)
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return false;
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// Okay, we can do this xform, do so now.
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const Type *Tys[] = { Ty };
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Module *M = CI->getParent()->getParent()->getParent();
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Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
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Value *Op = CI->getOperand(1);
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Op = CallInst::Create(Int, Op, CI->getName(), CI);
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CI->replaceAllUsesWith(Op);
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CI->eraseFromParent();
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return true;
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}
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template <class BaseTAI>
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bool X86TargetAsmInfo<BaseTAI>::ExpandInlineAsm(CallInst *CI) const {
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InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
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std::vector<InlineAsm::ConstraintInfo> Constraints = IA->ParseConstraints();
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std::string AsmStr = IA->getAsmString();
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// TODO: should remove alternatives from the asmstring: "foo {a|b}" -> "foo a"
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std::vector<std::string> AsmPieces;
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SplitString(AsmStr, AsmPieces, "\n"); // ; as separator?
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switch (AsmPieces.size()) {
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default: return false;
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case 1:
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AsmStr = AsmPieces[0];
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AsmPieces.clear();
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SplitString(AsmStr, AsmPieces, " \t"); // Split with whitespace.
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// bswap $0
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if (AsmPieces.size() == 2 &&
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(AsmPieces[0] == "bswap" ||
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AsmPieces[0] == "bswapq" ||
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AsmPieces[0] == "bswapl") &&
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(AsmPieces[1] == "$0" ||
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AsmPieces[1] == "${0:q}")) {
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// No need to check constraints, nothing other than the equivalent of
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// "=r,0" would be valid here.
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return LowerToBSwap(CI);
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}
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// rorw $$8, ${0:w} --> llvm.bswap.i16
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if (CI->getType() == Type::Int16Ty &&
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AsmPieces.size() == 3 &&
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AsmPieces[0] == "rorw" &&
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AsmPieces[1] == "$$8," &&
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AsmPieces[2] == "${0:w}" &&
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IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") {
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return LowerToBSwap(CI);
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}
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break;
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case 3:
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if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&
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Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" &&
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Constraints[1].Codes.size() == 1 && Constraints[1].Codes[0] == "0") {
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// bswap %eax / bswap %edx / xchgl %eax, %edx -> llvm.bswap.i64
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std::vector<std::string> Words;
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SplitString(AsmPieces[0], Words, " \t");
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if (Words.size() == 2 && Words[0] == "bswap" && Words[1] == "%eax") {
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Words.clear();
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SplitString(AsmPieces[1], Words, " \t");
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if (Words.size() == 2 && Words[0] == "bswap" && Words[1] == "%edx") {
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Words.clear();
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SplitString(AsmPieces[2], Words, " \t,");
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if (Words.size() == 3 && Words[0] == "xchgl" && Words[1] == "%eax" &&
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Words[2] == "%edx") {
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return LowerToBSwap(CI);
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}
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}
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}
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}
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break;
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}
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return false;
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}
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// Instantiate default implementation.
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TEMPLATE_INSTANTIATION(class X86TargetAsmInfo<TargetAsmInfo>);
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