llvm-6502/test/CodeGen
Chandler Carruth 12e69a0267 [x86] Add the initial skeleton of type-based dispatch for AVX vectors in
the new shuffle lowering and an implementation for v4 shuffles.

This allows us to handle non-half-crossing shuffles directly for v4
shuffles, both integer and floating point. This currently misses places
where we could perform the blend via UNPCK instructions, but otherwise
generates equally good or better code for the test cases included to the
existing vector shuffle lowering. There are a few cases that are
entertainingly better. ;]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-15 11:01:40 +00:00
..
AArch64 Revert several FastISel commits to track down a buildbot error. 2014-08-14 19:56:28 +00:00
ARM [FastISel][ARM] Fall-back to constant pool loads when materializing an i32 constant. 2014-08-14 23:29:49 +00:00
CPP
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips [mips] Improve robustness of some tests. 2014-08-14 13:10:48 +00:00
MSP430
NVPTX [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 2014-07-23 20:23:49 +00:00
PowerPC Revert several FastISel commits to track down a buildbot error. 2014-08-14 19:56:28 +00:00
R600 R600: Correctly set the src value offset for scalarized kernel args 2014-08-13 18:14:11 +00:00
SPARC
SystemZ
Thumb [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly 2014-08-02 05:40:40 +00:00
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 [x86] Add the initial skeleton of type-based dispatch for AVX vectors in 2014-08-15 11:01:40 +00:00
XCore