Jakob Stoklund Olesen ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism. ... A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-26 17:27:12 +00:00
..
AsmPrinter
TargetInfo
CMakeLists.txt
Makefile
Mips.h
Mips.td
MipsCallingConv.td
MipsDelaySlotFiller.cpp
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td
MipsISelDAGToDAG.cpp
MipsISelLowering.cpp
MipsISelLowering.h
MipsMachineFunction.h
MipsMCAsmInfo.cpp
MipsMCAsmInfo.h
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td	Replace the SubRegSet tablegen class with a less error-prone mechanism.	2010-05-26 17:27:12 +00:00
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h