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https://github.com/c64scene-ar/llvm-6502.git
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21c016f699
Summary: It's not emitted by the code generator so we only need assembler tests. Also added missing daddi aliases from dsub mnemonics, and removed a couple duplicate dsub tests. Depends on D4112 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4113 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210897 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
1.3 KiB
ArmAsm
19 lines
1.3 KiB
ArmAsm
# Instructions that are invalid and are correctly rejected but use the wrong
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# error message at the moment.
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#
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# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips2 \
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# RUN: 2>%t1
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# RUN: FileCheck %s < %t1
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.set noat
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dmult $s7,$a5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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ldl $t8,-4167($t8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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ldr $t2,-30358($s4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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lld $zero,-14736($ra) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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scd $t3,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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sd $t0,5835($a6) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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sdl $a3,-20961($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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sdr $a7,-20423($t0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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