llvm-6502/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

32 lines
940 B
LLVM

; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test_barrier_local:
; EG: GROUP_BARRIER
; SI: buffer_store_dword
; SI: s_waitcnt
; SI: s_barrier
define void @test_barrier_local(i32 addrspace(1)* %out) {
entry:
%0 = call i32 @llvm.r600.read.tidig.x()
%1 = getelementptr i32, i32 addrspace(1)* %out, i32 %0
store i32 %0, i32 addrspace(1)* %1
call void @llvm.AMDGPU.barrier.local()
%2 = call i32 @llvm.r600.read.local.size.x()
%3 = sub i32 %2, 1
%4 = sub i32 %3, %0
%5 = getelementptr i32, i32 addrspace(1)* %out, i32 %4
%6 = load i32, i32 addrspace(1)* %5
store i32 %6, i32 addrspace(1)* %1
ret void
}
declare void @llvm.AMDGPU.barrier.local()
declare i32 @llvm.r600.read.tidig.x() #0
declare i32 @llvm.r600.read.local.size.x() #0
attributes #0 = { readnone }