mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
2.8 KiB
LLVM
83 lines
2.8 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}uint_to_fp_i32_to_f32:
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; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z
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; SI: v_cvt_f32_u32_e32
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; SI: s_endpgm
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define void @uint_to_fp_i32_to_f32(float addrspace(1)* %out, i32 %in) {
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%result = uitofp i32 %in to float
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store float %result, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}uint_to_fp_v2i32_to_v2f32:
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; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W
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; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X
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; SI: v_cvt_f32_u32_e32
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; SI: v_cvt_f32_u32_e32
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; SI: s_endpgm
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define void @uint_to_fp_v2i32_to_v2f32(<2 x float> addrspace(1)* %out, <2 x i32> %in) {
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%result = uitofp <2 x i32> %in to <2 x float>
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store <2 x float> %result, <2 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}uint_to_fp_v4i32_to_v4f32:
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; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; SI: v_cvt_f32_u32_e32
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; SI: v_cvt_f32_u32_e32
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; SI: v_cvt_f32_u32_e32
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; SI: v_cvt_f32_u32_e32
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; SI: s_endpgm
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define void @uint_to_fp_v4i32_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%value = load <4 x i32>, <4 x i32> addrspace(1) * %in
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%result = uitofp <4 x i32> %value to <4 x float>
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store <4 x float> %result, <4 x float> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}uint_to_fp_i64_to_f32:
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; R600: UINT_TO_FLT
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; R600: UINT_TO_FLT
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; R600: MULADD_IEEE
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; SI: v_cvt_f32_u32_e32
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; SI: v_cvt_f32_u32_e32
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; SI: v_madmk_f32 {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, 0x4f800000
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; SI: s_endpgm
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define void @uint_to_fp_i64_to_f32(float addrspace(1)* %out, i64 %in) {
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entry:
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%0 = uitofp i64 %in to float
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store float %0, float addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}uint_to_fp_i1_to_f32:
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; SI: v_cmp_eq_i32_e64 [[CMP:s\[[0-9]+:[0-9]\]]],
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; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0, [[CMP]]
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; SI: buffer_store_dword [[RESULT]],
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; SI: s_endpgm
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define void @uint_to_fp_i1_to_f32(float addrspace(1)* %out, i32 %in) {
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%cmp = icmp eq i32 %in, 0
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%fp = uitofp i1 %cmp to float
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store float %fp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}uint_to_fp_i1_to_f32_load:
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; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0
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; SI: buffer_store_dword [[RESULT]],
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; SI: s_endpgm
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define void @uint_to_fp_i1_to_f32_load(float addrspace(1)* %out, i1 %in) {
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%fp = uitofp i1 %in to float
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store float %fp, float addrspace(1)* %out, align 4
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ret void
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}
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