llvm-6502/include/llvm/Target
Eric Christopher 8f232d307a Let the immediate leaf pattern take transforms and switch the signed
immediate patterns in arm to using the pattern.

Handles rdar://9299434


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 05:49:04 +00:00
..
Mangler.h
SubtargetFeature.h Increase SubtargetFeatureKV Value and Implies fields to 64 bits since some targets are getting very close to 32 subtarget features. Also teach tablegen to error when there are more than 64 features to guard against undefined behavior. rdar://9282332 2011-04-15 19:35:46 +00:00
Target.td Don't allow per-register spill size and alignment. 2011-04-21 03:43:21 +00:00
TargetAsmBackend.h
TargetAsmInfo.h Forward isFunctionEHFrameSymbolPrivate. If it is false, produce the foo.eh 2011-04-28 02:46:42 +00:00
TargetAsmLexer.h
TargetAsmParser.h
TargetCallingConv.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameLowering.h
TargetInstrDesc.h
TargetInstrInfo.h Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
TargetInstrItineraries.h Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h ARM byval support. Will be enabled by another patch to the FE. <rdar://problem/7662569> 2011-04-20 16:47:52 +00:00
TargetLoweringObjectFile.h Remove unnecessary argument. 2011-04-27 23:17:57 +00:00
TargetMachine.h
TargetOpcodes.h
TargetOptions.h Remove -use-divmod-libcall. Let targets opt in when they are available. 2011-04-20 22:20:12 +00:00
TargetRegisterInfo.h Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation. 2011-04-26 18:52:33 +00:00
TargetRegistry.h
TargetSchedule.td
TargetSelect.h
TargetSelectionDAG.td Let the immediate leaf pattern take transforms and switch the signed 2011-04-28 05:49:04 +00:00
TargetSelectionDAGInfo.h
TargetSubtarget.h