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Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some only support Thumb mode (M-class ones currently). This makes sure such CPUs default to the correct mode and makes the AsmParser diagnose an attempt to switch modes incorrectly. rdar://14024354 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183710 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
593 B
ArmAsm
25 lines
593 B
ArmAsm
@@ test st_value bit 0 of thumb function
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@ RUN: llvm-mc %s -triple=armv4t-freebsd-eabi -filetype=obj -o - | \
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@ RUN: llvm-readobj -r | FileCheck %s
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.syntax unified
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.text
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.globl f
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.align 2
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.type f,%function
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.code 16
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.thumb_func
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f:
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push {r7, lr}
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mov r7, sp
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bl g
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pop {r7, pc}
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@@ make sure an R_ARM_THM_CALL relocation is generated for the call to g
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@CHECK: Relocations [
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@CHECK-NEXT: Section (2) .rel.text {
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@CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0
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@CHECK-NEXT: }
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@CHECK-NEXT: ]
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