Nadav Rotem 14925e6b88 ARM Cost model: Use the size of vector registers and widest vectorizable instruction to determine the max vectorization factor. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172010 91177308-0d34-0410-b5e6-96231b3b80d8		2013-01-09 22:29:00 +00:00
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Analysis	Make opt grab the triple from the module and use it to initialize the target machine.	2013-01-01 08:00:32 +00:00
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y).	2013-01-09 20:56:40 +00:00
DebugInfo	Add the C testcase to this file.	2013-01-08 03:03:14 +00:00
ExecutionEngine
Feature	There was a switch fall-through in the parser for textual LLVM that caused	2013-01-07 13:32:38 +00:00
FileCheck
Instrumentation
Integer
JitListener
Linker
MC	PowerPC: EH adjustments	2013-01-09 17:08:15 +00:00
Object	[Object][ELF] Fix incorrect size of members for the 64 version of Elf_Phdr_Impl.	2013-01-06 03:57:11 +00:00
Other
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Transforms	ARM Cost model: Use the size of vector registers and widest vectorizable instruction to determine the max vectorization factor.	2013-01-09 22:29:00 +00:00
Unit
Verifier
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CMakeLists.txt
lit.cfg
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TestRunner.sh