mirror of
https://github.com/c64scene-ar/llvm-6502.git
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76a1dca38d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198030 91177308-0d34-0410-b5e6-96231b3b80d8
142 lines
5.4 KiB
C++
142 lines
5.4 KiB
C++
//===-- SparcMCInstLower.cpp - Convert Sparc MachineInstr to MCInst -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains code to lower Sparc MachineInstrs to their corresponding
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// MCInst records.
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//
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//===----------------------------------------------------------------------===//
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#include "Sparc.h"
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#include "MCTargetDesc/SparcBaseInfo.h"
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#include "MCTargetDesc/SparcMCExpr.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/ADT/SmallString.h"
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using namespace llvm;
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static MCOperand LowerSymbolOperand(const MachineInstr *MI,
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const MachineOperand &MO,
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AsmPrinter &AP) {
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SparcMCExpr::VariantKind Kind;
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const MCSymbol *Symbol = 0;
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unsigned TF = MO.getTargetFlags();
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switch(TF) {
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default: llvm_unreachable("Unknown target flags on operand");
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case SPII::MO_NO_FLAG: Kind = SparcMCExpr::VK_Sparc_None; break;
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case SPII::MO_LO: Kind = SparcMCExpr::VK_Sparc_LO; break;
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case SPII::MO_HI: Kind = SparcMCExpr::VK_Sparc_HI; break;
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case SPII::MO_H44: Kind = SparcMCExpr::VK_Sparc_H44; break;
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case SPII::MO_M44: Kind = SparcMCExpr::VK_Sparc_M44; break;
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case SPII::MO_L44: Kind = SparcMCExpr::VK_Sparc_L44; break;
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case SPII::MO_HH: Kind = SparcMCExpr::VK_Sparc_HH; break;
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case SPII::MO_HM: Kind = SparcMCExpr::VK_Sparc_HM; break;
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case SPII::MO_TLS_GD_HI22: Kind = SparcMCExpr::VK_Sparc_TLS_GD_HI22; break;
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case SPII::MO_TLS_GD_LO10: Kind = SparcMCExpr::VK_Sparc_TLS_GD_LO10; break;
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case SPII::MO_TLS_GD_ADD: Kind = SparcMCExpr::VK_Sparc_TLS_GD_ADD; break;
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case SPII::MO_TLS_GD_CALL: Kind = SparcMCExpr::VK_Sparc_TLS_GD_CALL; break;
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case SPII::MO_TLS_LDM_HI22: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_HI22; break;
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case SPII::MO_TLS_LDM_LO10: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_LO10; break;
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case SPII::MO_TLS_LDM_ADD: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_ADD; break;
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case SPII::MO_TLS_LDM_CALL: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_CALL; break;
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case SPII::MO_TLS_LDO_HIX22:Kind = SparcMCExpr::VK_Sparc_TLS_LDO_HIX22; break;
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case SPII::MO_TLS_LDO_LOX10:Kind = SparcMCExpr::VK_Sparc_TLS_LDO_LOX10; break;
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case SPII::MO_TLS_LDO_ADD: Kind = SparcMCExpr::VK_Sparc_TLS_LDO_ADD; break;
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case SPII::MO_TLS_IE_HI22: Kind = SparcMCExpr::VK_Sparc_TLS_IE_HI22; break;
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case SPII::MO_TLS_IE_LO10: Kind = SparcMCExpr::VK_Sparc_TLS_IE_LO10; break;
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case SPII::MO_TLS_IE_LD: Kind = SparcMCExpr::VK_Sparc_TLS_IE_LD; break;
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case SPII::MO_TLS_IE_LDX: Kind = SparcMCExpr::VK_Sparc_TLS_IE_LDX; break;
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case SPII::MO_TLS_IE_ADD: Kind = SparcMCExpr::VK_Sparc_TLS_IE_ADD; break;
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case SPII::MO_TLS_LE_HIX22: Kind = SparcMCExpr::VK_Sparc_TLS_LE_HIX22; break;
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case SPII::MO_TLS_LE_LOX10: Kind = SparcMCExpr::VK_Sparc_TLS_LE_LOX10; break;
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}
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switch(MO.getType()) {
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default: llvm_unreachable("Unknown type in LowerSymbolOperand");
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case MachineOperand::MO_MachineBasicBlock:
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Symbol = MO.getMBB()->getSymbol();
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break;
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case MachineOperand::MO_GlobalAddress:
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Symbol = AP.getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_BlockAddress:
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Symbol = AP.GetBlockAddressSymbol(MO.getBlockAddress());
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break;
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case MachineOperand::MO_ExternalSymbol:
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Symbol = AP.GetExternalSymbolSymbol(MO.getSymbolName());
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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Symbol = AP.GetCPISymbol(MO.getIndex());
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break;
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}
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const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol,
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AP.OutContext);
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const SparcMCExpr *expr = SparcMCExpr::Create(Kind, MCSym,
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AP.OutContext);
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return MCOperand::CreateExpr(expr);
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}
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static MCOperand LowerOperand(const MachineInstr *MI,
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const MachineOperand &MO,
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AsmPrinter &AP) {
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switch(MO.getType()) {
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default: llvm_unreachable("unknown operand type"); break;
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case MachineOperand::MO_Register:
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if (MO.isImplicit())
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break;
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return MCOperand::CreateReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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return MCOperand::CreateImm(MO.getImm());
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_BlockAddress:
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case MachineOperand::MO_ExternalSymbol:
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case MachineOperand::MO_ConstantPoolIndex:
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return LowerSymbolOperand(MI, MO, AP);
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case MachineOperand::MO_RegisterMask: break;
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}
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return MCOperand();
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}
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void llvm::LowerSparcMachineInstrToMCInst(const MachineInstr *MI,
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MCInst &OutMI,
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AsmPrinter &AP)
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{
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp = LowerOperand(MI, MO, AP);
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if (MCOp.isValid())
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OutMI.addOperand(MCOp);
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}
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}
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