Kevin Enderby 14ccc9007a Added a option to the disassembler to print immediates as hex. ... This is for the lldb team so most of but not all of the values are to be printed as hex with this option. Some small values like the scale in an X86 address were requested to printed in decimal without the leading 0x. There may be some tweaks need to places that may still be in decimal that they want in hex. Specially for arm. I made my best guess. Any tweaks from here should be simple. I also did the best I know now with help from the C++ gurus creating the cleanest formatImm() utility function and containing the changes. But if someone has a better idea to make something cleaner I'm all ears and game for changing the implementation. rdar://8109283 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8		2012-12-05 18:13:19 +00:00
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enhanced.txt	Make this test less sensitive.	2012-11-26 23:27:09 +00:00
hex-immediates.txt	Added a option to the disassembler to print immediates as hex.	2012-12-05 18:13:19 +00:00
intel-syntax.txt	Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.	2012-07-18 04:11:12 +00:00
invalid-cmp-imm.txt	Convert the uses of '|&' to use '2>&1 |' instead, which works on old	2012-07-02 18:37:59 +00:00
invalid-VEX-vvvv.txt	Convert the uses of '|&' to use '2>&1 |' instead, which works on old	2012-07-02 18:37:59 +00:00
lit.local.cfg	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
marked-up.txt	Add support for annotated disassembly output for X86 and arm.	2012-10-22 22:31:46 +00:00
simple-tests.txt	Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.	2012-07-26 07:48:28 +00:00
truncated-input.txt	Convert the uses of '|&' to use '2>&1 |' instead, which works on old	2012-07-02 18:37:59 +00:00
x86-32.txt	Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.	2012-07-26 07:48:28 +00:00
x86-64.txt	Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.	2012-05-29 19:05:25 +00:00