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https://github.com/c64scene-ar/llvm-6502.git
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bb803fd76e
Correctly support assembling "pushw $imm8" on x86-64 targets. Also some cleanup of the PUSH instructions (PUSH64i16 and PUSHi16 actually represent the same instruction) This fixes PR23996 Patch by: david.l.kreitzer@intel.com Differential Revision: http://reviews.llvm.org/D10878 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241404 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
957 B
ArmAsm
26 lines
957 B
ArmAsm
// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-objdump -d - | FileCheck %s
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// Test for proper instruction relaxation behavior for the push $imm
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// instruction forms. This is the 32-bit version of the push $imm tests from
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// relax-arith.s and relax-arith2.s.
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// CHECK: Disassembly of section push8:
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// CHECK-NEXT: push8:
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// CHECK-NEXT: 0: 66 6a 80 pushw $-128
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// CHECK-NEXT: 3: 66 6a 7f pushw $127
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// CHECK-NEXT: 6: 6a 80 pushl $-128
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// CHECK-NEXT: 8: 6a 7f pushl $127
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.section push8,"x"
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pushw $-128
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pushw $127
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push $-128
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push $127
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// CHECK: Disassembly of section push32:
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// CHECK-NEXT: push32:
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// CHECK-NEXT: 0: 66 68 00 00 pushw $0
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// CHECK-NEXT: 4: 68 00 00 00 00 pushl $0
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.section push32,"x"
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pushw $foo
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push $foo
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