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Pull an unsigned out of the Contents union such that it has the same size as two pointers and no padding. Arrange members such that the Contents union and all pointers can be 8-byte aligned without padding. This speeds up code generation by 0.8% on a 64-bit host. 32-bit hosts should be unaffected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116857 91177308-0d34-0410-b5e6-96231b3b80d8
555 lines
19 KiB
C++
555 lines
19 KiB
C++
//===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the MachineOperand class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEOPERAND_H
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#define LLVM_CODEGEN_MACHINEOPERAND_H
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#include "llvm/System/DataTypes.h"
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#include <cassert>
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namespace llvm {
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class BlockAddress;
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class ConstantFP;
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class GlobalValue;
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class MachineBasicBlock;
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class MachineInstr;
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class MachineRegisterInfo;
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class MDNode;
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class TargetMachine;
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class TargetRegisterInfo;
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class raw_ostream;
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class MCSymbol;
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/// MachineOperand class - Representation of each machine instruction operand.
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///
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class MachineOperand {
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public:
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enum MachineOperandType {
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MO_Register, ///< Register operand.
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MO_Immediate, ///< Immediate operand
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MO_FPImmediate, ///< Floating-point immediate operand
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MO_MachineBasicBlock, ///< MachineBasicBlock reference
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MO_FrameIndex, ///< Abstract Stack Frame Index
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MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
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MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
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MO_ExternalSymbol, ///< Name of external global symbol
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MO_GlobalAddress, ///< Address of a global value
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MO_BlockAddress, ///< Address of a basic block
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MO_Metadata, ///< Metadata reference (for debug info)
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MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
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};
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private:
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/// OpKind - Specify what kind of operand this is. This discriminates the
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/// union.
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unsigned char OpKind; // MachineOperandType
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/// SubReg - Subregister number, only valid for MO_Register. A value of 0
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/// indicates the MO_Register has no subReg.
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unsigned char SubReg;
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/// TargetFlags - This is a set of target-specific operand flags.
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unsigned char TargetFlags;
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/// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
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/// operands.
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/// IsDef - True if this is a def, false if this is a use of the register.
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///
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bool IsDef : 1;
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/// IsImp - True if this is an implicit def or use, false if it is explicit.
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///
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bool IsImp : 1;
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/// IsKill - True if this instruction is the last use of the register on this
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/// path through the function. This is only valid on uses of registers.
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bool IsKill : 1;
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/// IsDead - True if this register is never used by a subsequent instruction.
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/// This is only valid on definitions of registers.
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bool IsDead : 1;
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/// IsUndef - True if this is a register def / use of "undef", i.e. register
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/// defined by an IMPLICIT_DEF. This is only valid on registers.
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bool IsUndef : 1;
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/// IsEarlyClobber - True if this MO_Register 'def' operand is written to
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/// by the MachineInstr before all input registers are read. This is used to
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/// model the GCC inline asm '&' constraint modifier.
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bool IsEarlyClobber : 1;
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/// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
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/// not a real instruction. Such uses should be ignored during codegen.
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bool IsDebug : 1;
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/// SmallContents - Thisreally should be part of the Contents union, but lives
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/// out here so we can get a better packed struct.
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/// MO_Register: Register number.
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/// OffsetedInfo: Low bits of offset.
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union {
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unsigned RegNo; // For MO_Register.
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unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
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} SmallContents;
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/// ParentMI - This is the instruction that this operand is embedded into.
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/// This is valid for all operand types, when the operand is in an instr.
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MachineInstr *ParentMI;
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/// Contents union - This contains the payload for the various operand types.
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union {
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MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
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const ConstantFP *CFP; // For MO_FPImmediate.
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int64_t ImmVal; // For MO_Immediate.
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const MDNode *MD; // For MO_Metadata.
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MCSymbol *Sym; // For MO_MCSymbol
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struct { // For MO_Register.
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// Register number is in SmallContents.RegNo.
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MachineOperand **Prev; // Access list for register.
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MachineOperand *Next;
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} Reg;
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/// OffsetedInfo - This struct contains the offset and an object identifier.
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/// this represent the object as with an optional offset from it.
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struct {
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union {
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int Index; // For MO_*Index - The index itself.
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const char *SymbolName; // For MO_ExternalSymbol.
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const GlobalValue *GV; // For MO_GlobalAddress.
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const BlockAddress *BA; // For MO_BlockAddress.
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} Val;
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// Low bits of offset are in SmallContents.OffsetLo.
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int OffsetHi; // An offset from the object, high 32 bits.
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} OffsetedInfo;
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} Contents;
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explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
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TargetFlags = 0;
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}
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public:
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/// getType - Returns the MachineOperandType for this operand.
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///
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MachineOperandType getType() const { return (MachineOperandType)OpKind; }
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unsigned char getTargetFlags() const { return TargetFlags; }
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void setTargetFlags(unsigned char F) { TargetFlags = F; }
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void addTargetFlag(unsigned char F) { TargetFlags |= F; }
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/// getParent - Return the instruction that this operand belongs to.
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///
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MachineInstr *getParent() { return ParentMI; }
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const MachineInstr *getParent() const { return ParentMI; }
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void print(raw_ostream &os, const TargetMachine *TM = 0) const;
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//===--------------------------------------------------------------------===//
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// Accessors that tell you what kind of MachineOperand you're looking at.
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//===--------------------------------------------------------------------===//
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/// isReg - Tests if this is a MO_Register operand.
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bool isReg() const { return OpKind == MO_Register; }
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/// isImm - Tests if this is a MO_Immediate operand.
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bool isImm() const { return OpKind == MO_Immediate; }
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/// isFPImm - Tests if this is a MO_FPImmediate operand.
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bool isFPImm() const { return OpKind == MO_FPImmediate; }
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/// isMBB - Tests if this is a MO_MachineBasicBlock operand.
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bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
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/// isFI - Tests if this is a MO_FrameIndex operand.
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bool isFI() const { return OpKind == MO_FrameIndex; }
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/// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
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bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
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/// isJTI - Tests if this is a MO_JumpTableIndex operand.
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bool isJTI() const { return OpKind == MO_JumpTableIndex; }
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/// isGlobal - Tests if this is a MO_GlobalAddress operand.
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bool isGlobal() const { return OpKind == MO_GlobalAddress; }
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/// isSymbol - Tests if this is a MO_ExternalSymbol operand.
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bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
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/// isBlockAddress - Tests if this is a MO_BlockAddress operand.
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bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
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/// isMetadata - Tests if this is a MO_Metadata operand.
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bool isMetadata() const { return OpKind == MO_Metadata; }
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bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
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//===--------------------------------------------------------------------===//
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// Accessors for Register Operands
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//===--------------------------------------------------------------------===//
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/// getReg - Returns the register number.
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unsigned getReg() const {
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assert(isReg() && "This is not a register operand!");
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return SmallContents.RegNo;
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}
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unsigned getSubReg() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return (unsigned)SubReg;
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}
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bool isUse() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return !IsDef;
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}
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bool isDef() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsDef;
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}
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bool isImplicit() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsImp;
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}
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bool isDead() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsDead;
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}
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bool isKill() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsKill;
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}
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bool isUndef() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsUndef;
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}
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bool isEarlyClobber() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsEarlyClobber;
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}
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bool isDebug() const {
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assert(isReg() && "Wrong MachineOperand accessor");
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return IsDebug;
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}
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/// getNextOperandForReg - Return the next MachineOperand in the function that
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/// uses or defines this register.
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MachineOperand *getNextOperandForReg() const {
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assert(isReg() && "This is not a register operand!");
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return Contents.Reg.Next;
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}
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//===--------------------------------------------------------------------===//
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// Mutators for Register Operands
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//===--------------------------------------------------------------------===//
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/// Change the register this operand corresponds to.
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///
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void setReg(unsigned Reg);
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void setSubReg(unsigned subReg) {
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assert(isReg() && "Wrong MachineOperand accessor");
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SubReg = (unsigned char)subReg;
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}
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/// substVirtReg - Substitute the current register with the virtual
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/// subregister Reg:SubReg. Take any existing SubReg index into account,
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/// using TargetRegisterInfo to compose the subreg indices if necessary.
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/// Reg must be a virtual register, SubIdx can be 0.
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///
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void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
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/// substPhysReg - Substitute the current register with the physical register
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/// Reg, taking any existing SubReg into account. For instance,
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/// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
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///
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void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
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void setIsUse(bool Val = true) {
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assert(isReg() && "Wrong MachineOperand accessor");
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assert((Val || !isDebug()) && "Marking a debug operation as def");
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IsDef = !Val;
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}
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void setIsDef(bool Val = true) {
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assert(isReg() && "Wrong MachineOperand accessor");
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assert((!Val || !isDebug()) && "Marking a debug operation as def");
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IsDef = Val;
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}
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void setImplicit(bool Val = true) {
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assert(isReg() && "Wrong MachineOperand accessor");
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IsImp = Val;
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}
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void setIsKill(bool Val = true) {
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assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
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assert((!Val || !isDebug()) && "Marking a debug operation as kill");
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IsKill = Val;
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}
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void setIsDead(bool Val = true) {
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assert(isReg() && IsDef && "Wrong MachineOperand accessor");
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IsDead = Val;
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}
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void setIsUndef(bool Val = true) {
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assert(isReg() && "Wrong MachineOperand accessor");
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IsUndef = Val;
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}
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void setIsEarlyClobber(bool Val = true) {
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assert(isReg() && IsDef && "Wrong MachineOperand accessor");
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IsEarlyClobber = Val;
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}
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void setIsDebug(bool Val = true) {
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assert(isReg() && IsDef && "Wrong MachineOperand accessor");
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IsDebug = Val;
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}
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//===--------------------------------------------------------------------===//
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// Accessors for various operand types.
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//===--------------------------------------------------------------------===//
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int64_t getImm() const {
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assert(isImm() && "Wrong MachineOperand accessor");
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return Contents.ImmVal;
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}
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const ConstantFP *getFPImm() const {
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assert(isFPImm() && "Wrong MachineOperand accessor");
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return Contents.CFP;
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}
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MachineBasicBlock *getMBB() const {
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assert(isMBB() && "Wrong MachineOperand accessor");
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return Contents.MBB;
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}
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int getIndex() const {
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assert((isFI() || isCPI() || isJTI()) &&
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"Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.Index;
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}
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const GlobalValue *getGlobal() const {
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assert(isGlobal() && "Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.GV;
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}
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const BlockAddress *getBlockAddress() const {
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assert(isBlockAddress() && "Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.BA;
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}
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MCSymbol *getMCSymbol() const {
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assert(isMCSymbol() && "Wrong MachineOperand accessor");
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return Contents.Sym;
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}
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/// getOffset - Return the offset from the symbol in this operand. This always
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/// returns 0 for ExternalSymbol operands.
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int64_t getOffset() const {
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assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
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"Wrong MachineOperand accessor");
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return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
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SmallContents.OffsetLo;
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}
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const char *getSymbolName() const {
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assert(isSymbol() && "Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.SymbolName;
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}
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const MDNode *getMetadata() const {
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assert(isMetadata() && "Wrong MachineOperand accessor");
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return Contents.MD;
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}
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//===--------------------------------------------------------------------===//
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// Mutators for various operand types.
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//===--------------------------------------------------------------------===//
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void setImm(int64_t immVal) {
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assert(isImm() && "Wrong MachineOperand mutator");
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Contents.ImmVal = immVal;
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}
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void setOffset(int64_t Offset) {
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assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
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"Wrong MachineOperand accessor");
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SmallContents.OffsetLo = unsigned(Offset);
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Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
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}
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void setIndex(int Idx) {
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assert((isFI() || isCPI() || isJTI()) &&
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"Wrong MachineOperand accessor");
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Contents.OffsetedInfo.Val.Index = Idx;
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}
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void setMBB(MachineBasicBlock *MBB) {
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assert(isMBB() && "Wrong MachineOperand accessor");
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Contents.MBB = MBB;
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}
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//===--------------------------------------------------------------------===//
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// Other methods.
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//===--------------------------------------------------------------------===//
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/// isIdenticalTo - Return true if this operand is identical to the specified
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/// operand. Note: This method ignores isKill and isDead properties.
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bool isIdenticalTo(const MachineOperand &Other) const;
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/// ChangeToImmediate - Replace this operand with a new immediate operand of
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImm method should be used.
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void ChangeToImmediate(int64_t ImmVal);
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/// ChangeToRegister - Replace this operand with a new register operand of
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/// the specified value. If an operand is known to be an register already,
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/// the setReg method should be used.
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void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false,
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bool isUndef = false, bool isDebug = false);
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//===--------------------------------------------------------------------===//
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// Construction methods.
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//===--------------------------------------------------------------------===//
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static MachineOperand CreateImm(int64_t Val) {
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MachineOperand Op(MachineOperand::MO_Immediate);
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Op.setImm(Val);
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return Op;
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}
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static MachineOperand CreateFPImm(const ConstantFP *CFP) {
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MachineOperand Op(MachineOperand::MO_FPImmediate);
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Op.Contents.CFP = CFP;
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return Op;
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}
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static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false,
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bool isUndef = false,
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bool isEarlyClobber = false,
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unsigned SubReg = 0,
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bool isDebug = false) {
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MachineOperand Op(MachineOperand::MO_Register);
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Op.IsDef = isDef;
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Op.IsImp = isImp;
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Op.IsKill = isKill;
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Op.IsDead = isDead;
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Op.IsUndef = isUndef;
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Op.IsEarlyClobber = isEarlyClobber;
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Op.IsDebug = isDebug;
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Op.SmallContents.RegNo = Reg;
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Op.Contents.Reg.Prev = 0;
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Op.Contents.Reg.Next = 0;
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Op.SubReg = SubReg;
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return Op;
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}
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static MachineOperand CreateMBB(MachineBasicBlock *MBB,
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unsigned char TargetFlags = 0) {
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MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
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Op.setMBB(MBB);
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Op.setTargetFlags(TargetFlags);
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return Op;
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}
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static MachineOperand CreateFI(unsigned Idx) {
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MachineOperand Op(MachineOperand::MO_FrameIndex);
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Op.setIndex(Idx);
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return Op;
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}
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static MachineOperand CreateCPI(unsigned Idx, int Offset,
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unsigned char TargetFlags = 0) {
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MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
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Op.setIndex(Idx);
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Op.setOffset(Offset);
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Op.setTargetFlags(TargetFlags);
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return Op;
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}
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static MachineOperand CreateJTI(unsigned Idx,
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unsigned char TargetFlags = 0) {
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MachineOperand Op(MachineOperand::MO_JumpTableIndex);
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Op.setIndex(Idx);
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Op.setTargetFlags(TargetFlags);
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return Op;
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}
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static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
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unsigned char TargetFlags = 0) {
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MachineOperand Op(MachineOperand::MO_GlobalAddress);
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Op.Contents.OffsetedInfo.Val.GV = GV;
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Op.setOffset(Offset);
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Op.setTargetFlags(TargetFlags);
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return Op;
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}
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static MachineOperand CreateES(const char *SymName,
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unsigned char TargetFlags = 0) {
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MachineOperand Op(MachineOperand::MO_ExternalSymbol);
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Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
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Op.setOffset(0); // Offset is always 0.
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Op.setTargetFlags(TargetFlags);
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return Op;
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}
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static MachineOperand CreateBA(const BlockAddress *BA,
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unsigned char TargetFlags = 0) {
|
|
MachineOperand Op(MachineOperand::MO_BlockAddress);
|
|
Op.Contents.OffsetedInfo.Val.BA = BA;
|
|
Op.setOffset(0); // Offset is always 0.
|
|
Op.setTargetFlags(TargetFlags);
|
|
return Op;
|
|
}
|
|
static MachineOperand CreateMetadata(const MDNode *Meta) {
|
|
MachineOperand Op(MachineOperand::MO_Metadata);
|
|
Op.Contents.MD = Meta;
|
|
return Op;
|
|
}
|
|
|
|
static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
|
|
MachineOperand Op(MachineOperand::MO_MCSymbol);
|
|
Op.Contents.Sym = Sym;
|
|
return Op;
|
|
}
|
|
|
|
friend class MachineInstr;
|
|
friend class MachineRegisterInfo;
|
|
private:
|
|
//===--------------------------------------------------------------------===//
|
|
// Methods for handling register use/def lists.
|
|
//===--------------------------------------------------------------------===//
|
|
|
|
/// isOnRegUseList - Return true if this operand is on a register use/def list
|
|
/// or false if not. This can only be called for register operands that are
|
|
/// part of a machine instruction.
|
|
bool isOnRegUseList() const {
|
|
assert(isReg() && "Can only add reg operand to use lists");
|
|
return Contents.Reg.Prev != 0;
|
|
}
|
|
|
|
/// AddRegOperandToRegInfo - Add this register operand to the specified
|
|
/// MachineRegisterInfo. If it is null, then the next/prev fields should be
|
|
/// explicitly nulled out.
|
|
void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
|
|
|
|
/// RemoveRegOperandFromRegInfo - Remove this register operand from the
|
|
/// MachineRegisterInfo it is linked with.
|
|
void RemoveRegOperandFromRegInfo();
|
|
};
|
|
|
|
inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
|
|
MO.print(OS, 0);
|
|
return OS;
|
|
}
|
|
|
|
} // End llvm namespace
|
|
|
|
#endif
|