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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107887 91177308-0d34-0410-b5e6-96231b3b80d8
169 lines
5.8 KiB
C++
169 lines
5.8 KiB
C++
//===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the machine register scavenger class. It can provide
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// information such as unused register at any point in a machine basic block.
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// It also provides a mechanism to make registers availbale by evicting them
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// to spill slots.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
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#define LLVM_CODEGEN_REGISTER_SCAVENGING_H
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/ADT/BitVector.h"
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namespace llvm {
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class MachineRegisterInfo;
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class TargetRegisterInfo;
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class TargetInstrInfo;
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class TargetRegisterClass;
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class RegScavenger {
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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MachineRegisterInfo* MRI;
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MachineBasicBlock *MBB;
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MachineBasicBlock::iterator MBBI;
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unsigned NumPhysRegs;
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/// Tracking - True if RegScavenger is currently tracking the liveness of
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/// registers.
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bool Tracking;
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/// ScavengingFrameIndex - Special spill slot used for scavenging a register
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/// post register allocation.
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int ScavengingFrameIndex;
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/// ScavengedReg - If none zero, the specific register is currently being
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/// scavenged. That is, it is spilled to the special scavenging stack slot.
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unsigned ScavengedReg;
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/// ScavengedRC - Register class of the scavenged register.
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///
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const TargetRegisterClass *ScavengedRC;
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/// ScavengeRestore - Instruction that restores the scavenged register from
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/// stack.
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const MachineInstr *ScavengeRestore;
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/// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
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///
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BitVector CalleeSavedRegs;
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/// ReservedRegs - A bitvector of reserved registers.
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///
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BitVector ReservedRegs;
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/// RegsAvailable - The current state of all the physical registers immediately
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/// before MBBI. One bit per physical register. If bit is set that means it's
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/// available, unset means the register is currently being used.
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BitVector RegsAvailable;
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public:
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RegScavenger()
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: MBB(NULL), NumPhysRegs(0), Tracking(false),
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ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
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/// enterBasicBlock - Start tracking liveness from the begin of the specific
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/// basic block.
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void enterBasicBlock(MachineBasicBlock *mbb);
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/// initRegState - allow resetting register state info for multiple
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/// passes over/within the same function.
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void initRegState();
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/// forward - Move the internal MBB iterator and update register states.
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void forward();
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/// forward - Move the internal MBB iterator and update register states until
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/// it has processed the specific iterator.
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void forward(MachineBasicBlock::iterator I) {
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if (!Tracking && MBB->begin() != I) forward();
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while (MBBI != I) forward();
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}
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/// skipTo - Move the internal MBB iterator but do not update register states.
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///
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void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
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/// getRegsUsed - return all registers currently in use in used.
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void getRegsUsed(BitVector &used, bool includeReserved);
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/// getRegsAvailable - Return all available registers in the register class
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/// in Mask.
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void getRegsAvailable(const TargetRegisterClass *RC, BitVector &Mask);
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/// FindUnusedReg - Find a unused register of the specified register class.
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/// Return 0 if none is found.
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unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
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/// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
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/// ScavengingFrameIndex.
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void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
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int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
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/// scavengeRegister - Make a register of the specific register class
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/// available and do the appropriate bookkeeping. SPAdj is the stack
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/// adjustment due to call frame, it's passed along to eliminateFrameIndex().
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/// Returns the scavenged register.
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unsigned scavengeRegister(const TargetRegisterClass *RegClass,
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MachineBasicBlock::iterator I, int SPAdj);
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unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
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return scavengeRegister(RegClass, MBBI, SPAdj);
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}
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/// setUsed - Tell the scavenger a register is used.
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///
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void setUsed(unsigned Reg);
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private:
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/// isReserved - Returns true if a register is reserved. It is never "unused".
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bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); }
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/// isUsed / isUnused - Test if a register is currently being used.
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///
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bool isUsed(unsigned Reg) const { return !RegsAvailable.test(Reg); }
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bool isUnused(unsigned Reg) const { return RegsAvailable.test(Reg); }
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/// isAliasUsed - Is Reg or an alias currently in use?
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bool isAliasUsed(unsigned Reg) const;
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/// setUsed / setUnused - Mark the state of one or a number of registers.
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///
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void setUsed(BitVector &Regs) {
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RegsAvailable &= ~Regs;
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}
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void setUnused(BitVector &Regs) {
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RegsAvailable |= Regs;
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}
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/// Add Reg and all its sub-registers to BV.
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void addRegWithSubRegs(BitVector &BV, unsigned Reg);
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/// Add Reg and its aliases to BV.
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void addRegWithAliases(BitVector &BV, unsigned Reg);
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/// findSurvivorReg - Return the candidate register that is unused for the
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/// longest after StartMI. UseMI is set to the instruction where the search
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/// stopped.
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///
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/// No more than InstrLimit instructions are inspected.
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unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
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BitVector &Candidates,
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unsigned InstrLimit,
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MachineBasicBlock::iterator &UseMI);
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};
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} // End llvm namespace
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#endif
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