mirror of
https://github.com/c64scene-ar/llvm-6502.git
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This includes instructions that relate to memory access (load/store/GEP), comparison instructions and calls. Work was done by lama.saba@intel.com. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202647 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
3.4 KiB
LLVM
127 lines
3.4 KiB
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
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; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
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; The test checks that LLVM does not misread miscellaneous instructions of
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; older bitcode files.
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define void @icmp(i32 %x1, i32 %x2, i32* %ptr1, i32* %ptr2, <2 x i32> %vec1, <2 x i32> %vec2){
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entry:
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; CHECK: %res1 = icmp eq i32 %x1, %x2
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%res1 = icmp eq i32 %x1, %x2
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; CHECK-NEXT: %res2 = icmp ne i32 %x1, %x2
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%res2 = icmp ne i32 %x1, %x2
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; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
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%res3 = icmp ugt i32 %x1, %x2
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; CHECK-NEXT: %res4 = icmp uge i32 %x1, %x2
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%res4 = icmp uge i32 %x1, %x2
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; CHECK-NEXT: %res5 = icmp ult i32 %x1, %x2
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%res5 = icmp ult i32 %x1, %x2
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; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
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%res6 = icmp ule i32 %x1, %x2
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; CHECK-NEXT: %res7 = icmp sgt i32 %x1, %x2
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%res7 = icmp sgt i32 %x1, %x2
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; CHECK-NEXT: %res8 = icmp sge i32 %x1, %x2
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%res8 = icmp sge i32 %x1, %x2
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; CHECK-NEXT: %res9 = icmp slt i32 %x1, %x2
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%res9 = icmp slt i32 %x1, %x2
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; CHECK-NEXT: %res10 = icmp sle i32 %x1, %x2
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%res10 = icmp sle i32 %x1, %x2
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; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
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%res11 = icmp eq i32* %ptr1, %ptr2
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; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
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%res12 = icmp eq <2 x i32> %vec1, %vec2
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ret void
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}
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define void @fcmp(float %x1, float %x2, <2 x float> %vec1, <2 x float> %vec2){
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entry:
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; CHECK: %res1 = fcmp oeq float %x1, %x2
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%res1 = fcmp oeq float %x1, %x2
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; CHECK-NEXT: %res2 = fcmp one float %x1, %x2
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%res2 = fcmp one float %x1, %x2
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; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
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%res3 = fcmp ugt float %x1, %x2
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; CHECK-NEXT: %res4 = fcmp uge float %x1, %x2
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%res4 = fcmp uge float %x1, %x2
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; CHECK-NEXT: %res5 = fcmp ult float %x1, %x2
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%res5 = fcmp ult float %x1, %x2
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; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
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%res6 = fcmp ule float %x1, %x2
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; CHECK-NEXT: %res7 = fcmp ogt float %x1, %x2
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%res7 = fcmp ogt float %x1, %x2
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; CHECK-NEXT: %res8 = fcmp oge float %x1, %x2
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%res8 = fcmp oge float %x1, %x2
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; CHECK-NEXT: %res9 = fcmp olt float %x1, %x2
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%res9 = fcmp olt float %x1, %x2
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; CHECK-NEXT: %res10 = fcmp ole float %x1, %x2
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%res10 = fcmp ole float %x1, %x2
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; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
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%res11 = fcmp ord float %x1, %x2
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; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
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%res12 = fcmp ueq float %x1, %x2
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; CHECK-NEXT: %res13 = fcmp une float %x1, %x2
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%res13 = fcmp une float %x1, %x2
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; CHECK-NEXT: %res14 = fcmp uno float %x1, %x2
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%res14 = fcmp uno float %x1, %x2
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; CHECK-NEXT: %res15 = fcmp true float %x1, %x2
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%res15 = fcmp true float %x1, %x2
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; CHECK-NEXT: %res16 = fcmp false float %x1, %x2
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%res16 = fcmp false float %x1, %x2
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; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
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%res17 = fcmp oeq <2 x float> %vec1, %vec2
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ret void
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}
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declare i32 @printf(i8* noalias nocapture, ...)
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define void @call(i32 %x, i8* %msg ){
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entry:
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; CHECK: %res1 = call i32 @test(i32 %x)
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%res1 = call i32 @test(i32 %x)
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; CHECK-NEXT: %res2 = tail call i32 @test(i32 %x)
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%res2 = tail call i32 @test(i32 %x)
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; CHECK-NEXT: %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
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%res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
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ret void
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}
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define i32 @test(i32 %x){
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entry:
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ret i32 %x
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}
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