Johnny Chen 157536b1fb Fix SRS/SRSW encoding bits. ... rdar://problem/9230801 ARM disassembler discrepancy: erroneously accepting SRS Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with http://llvm.org/viewvc/llvm-project?view=rev&revision=128859. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128864 91177308-0d34-0410-b5e6-96231b3b80d8		2011-04-05 00:16:18 +00:00
..
Analysis	Revert r128140 for now.	2011-03-23 15:51:12 +00:00
Archive
Assembler	Remove some support for ReturnInsts with multiple operands, and for	2011-04-04 07:44:02 +00:00
Bindings/Ocaml
Bitcode	Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends	2011-03-29 23:06:19 +00:00
BugPoint
CodeGen	Allow coalescing with reserved physregs in certain cases:	2011-04-04 21:00:03 +00:00
DebugInfo	Move test in x86 specific area.	2011-03-24 22:39:09 +00:00
ExecutionEngine
Feature
FrontendAda	Will not compile without the spec!	2011-03-31 10:03:32 +00:00
FrontendC	Testcase for r128619 (PR9571).	2011-03-31 08:13:57 +00:00
FrontendC++
FrontendFortran
FrontendObjC
FrontendObjC++
Integer
lib
Linker
LLVMC
MC	Fix SRS/SRSW encoding bits.	2011-04-05 00:16:18 +00:00
Object
Other
Scripts
TableGen
Transforms	PR9446: RecursivelyDeleteTriviallyDeadInstructions can delete the instruction	2011-04-02 22:45:17 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh