llvm-6502/test/CodeGen
Hal Finkel 159e7f4095 [PowerPC] Lower VSELECT using xxsel when VSX is available
With VSX there is a real vector select instruction, and so we should use it.
Note that VSELECT will still scalarize for v2f64 because the corresponding
SetCC result type (v2i64) is not currently a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 12:49:28 +00:00
..
AArch64 Register Allocator: check other options before using a CSR for the first time. 2014-03-25 00:16:25 +00:00
ARM test: fix CHECK lines 2014-03-25 03:39:39 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Correct lowering of VECTOR_SHUFFLE to VSHF. 2014-03-21 16:56:51 +00:00
MSP430
NVPTX Add test to test/CodeGen/NVPTX for "alloca buffer" arguments. 2014-03-24 16:52:30 +00:00
PowerPC [PowerPC] Lower VSELECT using xxsel when VSX is available 2014-03-26 12:49:28 +00:00
R600 R600: Add failing testcase for <3 x i32> stores. 2014-03-25 16:50:55 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb
Thumb2
X86 Revert "Prevent alias from pointing to weak aliases." 2014-03-26 06:14:40 +00:00
XCore