llvm-6502/test/CodeGen
Andrea Di Biagio 15d2c3fb00 [DAGCombiner] Fix wrong folding of AND dag nodes.
This patch fixes the logic in the DAGCombiner that folds an AND node according
to rule: (and (X (load V)), C) -> (X (load V))

An AND between a vector load 'X' and a constant build_vector 'C' can be folded
into the load itself only if we can prove that the AND operation is redundant.
The algorithm implemented by 'visitAND' firstly computes the splat value 'S'
from C, and then checks if S has the lower 'B' bits set (where B is the size in
bits of the vector element type). The algorithm takes into account also the
'undef' bits in the splat mask.

Unfortunately, the algorithm only worked under the assumption that the size of S
is a multiple of the vector element type. With this patch, we conservatively
avoid folding the AND if the splat bits are not compatible with the vector
element type.

Added X86 test and-load-fold.ll

Differential Revision: http://reviews.llvm.org/D8085


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 12:24:55 +00:00
..
AArch64 [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. 2015-03-06 22:42:10 +00:00
ARM Remove use of misched-bench from this test and replace it with 2015-03-07 01:39:06 +00:00
BPF [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
Generic DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Hexagon DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Inputs DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Mips [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator 2015-03-04 15:47:42 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
NVPTX [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
PowerPC Use the correct func begin symbol in all places in ppc. 2015-03-05 19:47:50 +00:00
R600 DAGCombiner: Canonicalize select(and/or,x,y) depending on target. 2015-03-06 19:49:10 +00:00
SPARC Use the vanilla func_end symbol for .size. 2015-03-04 01:35:23 +00:00
SystemZ Change SystemZ large tests to use the existing long_tests property 2015-03-02 19:34:11 +00:00
Thumb DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Thumb2 Make DataLayout Non-Optional in the Module 2015-03-04 18:43:29 +00:00
WinEH Replace llvm.frameallocate with llvm.frameescape 2015-03-05 18:26:34 +00:00
X86 [DAGCombiner] Fix wrong folding of AND dag nodes. 2015-03-07 12:24:55 +00:00
XCore DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00