llvm-6502/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
2009-09-08 23:54:48 +00:00

10 lines
250 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
; PR2484
define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
entry:
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4,i32
5,i32 2,i32 3>
ret <4 x float> %shuffle
}