mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-13 06:25:02 +00:00
16507fe9fd
leading/trailing bits. Patch by Alastair Lynn! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92706 91177308-0d34-0410-b5e6-96231b3b80d8
125 lines
3.5 KiB
LLVM
125 lines
3.5 KiB
LLVM
; RUN: opt %s -instcombine -S | FileCheck %s
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%overflow.result = type {i8, i1}
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declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8)
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declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8)
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declare double @llvm.powi.f64(double, i32) nounwind readonly
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declare i32 @llvm.cttz.i32(i32) nounwind readnone
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declare i8 @llvm.ctlz.i8(i8) nounwind readnone
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define i8 @test1(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
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%y = extractvalue %overflow.result %x, 0
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ret i8 %y
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; CHECK: @test1
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; CHECK-NEXT: %y = add i8 %A, %B
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; CHECK-NEXT: ret i8 %y
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}
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define i8 @test2(i8 %A, i8 %B, i1* %overflowPtr) {
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%and.A = and i8 %A, 127
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%and.B = and i8 %B, 127
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @test2
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; CHECK-NEXT: %and.A = and i8 %A, 127
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; CHECK-NEXT: %and.B = and i8 %B, 127
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; CHECK-NEXT: %1 = add nuw i8 %and.A, %and.B
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %1
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}
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define i8 @test3(i8 %A, i8 %B, i1* %overflowPtr) {
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%or.A = or i8 %A, -128
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%or.B = or i8 %B, -128
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @test3
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; CHECK-NEXT: %or.A = or i8 %A, -128
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; CHECK-NEXT: %or.B = or i8 %B, -128
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; CHECK-NEXT: %1 = add i8 %or.A, %or.B
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; CHECK-NEXT: store i1 true, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %1
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}
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define i8 @test4(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @test4
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; CHECK-NEXT: ret i8 undef
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}
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define i8 @test5(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @test5
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 0
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}
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define i8 @test6(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @test6
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %A
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}
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define void @powi(double %V, double *%P) {
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entry:
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%A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
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volatile store double %A, double* %P
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%B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind
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volatile store double %B, double* %P
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%C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind
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volatile store double %C, double* %P
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ret void
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; CHECK: @powi
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; CHECK: %A = fdiv double 1.0{{.*}}, %V
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; CHECK: volatile store double %A,
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; CHECK: volatile store double 1.0
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; CHECK: volatile store double %V
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}
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define i32 @cttz(i32 %a)
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{
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entry:
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%or = or i32 %a, 8
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%and = and i32 %or, -8
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%count = tail call i32 @llvm.cttz.i32(i32 %and) nounwind readnone
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ret i32 %count
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; CHECK: @cttz
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i32 3
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}
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define i8 @ctlz(i8 %a)
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{
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entry:
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%or = or i8 %a, 32
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%and = and i8 %or, 63
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%count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
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ret i8 %count
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; CHECK: @ctlz
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i8 2
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}
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