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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
84 lines
2.6 KiB
LLVM
84 lines
2.6 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
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@var32 = global [3 x i32] zeroinitializer
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@var64 = global [3 x i64] zeroinitializer
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@var32_align64 = global [3 x i32] zeroinitializer, align 8
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@alias = alias [3 x i32]* @var32_align64
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define i64 @test_align32() {
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; CHECK-LABEL: test_align32:
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%addr = bitcast [3 x i32]* @var32 to i64*
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; Since @var32 is only guaranteed to be aligned to 32-bits, it's invalid to
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; emit an "LDR x0, [x0, #:lo12:var32] instruction to implement this load.
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%val = load i64, i64* %addr
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; CHECK: adrp [[HIBITS:x[0-9]+]], var32
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; CHECK: add x[[ADDR:[0-9]+]], [[HIBITS]], {{#?}}:lo12:var32
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; CHECK: ldr x0, [x[[ADDR]]]
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ret i64 %val
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}
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define i64 @test_align64() {
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; CHECK-LABEL: test_align64:
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%addr = bitcast [3 x i64]* @var64 to i64*
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; However, var64 *is* properly aligned and emitting an adrp/add/ldr would be
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; inefficient.
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%val = load i64, i64* %addr
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; CHECK: adrp x[[HIBITS:[0-9]+]], var64
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; CHECK-NOT: add x[[HIBITS]]
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; CHECK: ldr x0, [x[[HIBITS]], {{#?}}:lo12:var64]
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ret i64 %val
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}
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define i64 @test_var32_align64() {
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; CHECK-LABEL: test_var32_align64:
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%addr = bitcast [3 x i32]* @var32_align64 to i64*
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; Since @var32 is only guaranteed to be aligned to 32-bits, it's invalid to
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; emit an "LDR x0, [x0, #:lo12:var32] instruction to implement this load.
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%val = load i64, i64* %addr
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; CHECK: adrp x[[HIBITS:[0-9]+]], var32_align64
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; CHECK-NOT: add x[[HIBITS]]
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; CHECK: ldr x0, [x[[HIBITS]], {{#?}}:lo12:var32_align64]
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ret i64 %val
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}
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define i64 @test_var32_alias() {
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; CHECK-LABEL: test_var32_alias:
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%addr = bitcast [3 x i32]* @alias to i64*
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; Test that we can find the alignment for aliases.
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%val = load i64, i64* %addr
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; CHECK: adrp x[[HIBITS:[0-9]+]], alias
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; CHECK-NOT: add x[[HIBITS]]
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; CHECK: ldr x0, [x[[HIBITS]], {{#?}}:lo12:alias]
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ret i64 %val
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}
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@yet_another_var = external global {i32, i32}
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define i64 @test_yet_another_var() {
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; CHECK-LABEL: test_yet_another_var:
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; @yet_another_var has a preferred alignment of 8, but that's not enough if
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; we're going to be linking against other things. Its ABI alignment is only 4
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; so we can't fold the load.
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%val = load i64, i64* bitcast({i32, i32}* @yet_another_var to i64*)
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; CHECK: adrp [[HIBITS:x[0-9]+]], yet_another_var
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; CHECK: add x[[ADDR:[0-9]+]], [[HIBITS]], {{#?}}:lo12:yet_another_var
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; CHECK: ldr x0, [x[[ADDR]]]
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ret i64 %val
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}
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define i64()* @test_functions() {
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; CHECK-LABEL: test_functions:
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ret i64()* @test_yet_another_var
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; CHECK: adrp [[HIBITS:x[0-9]+]], test_yet_another_var
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; CHECK: add x0, [[HIBITS]], {{#?}}:lo12:test_yet_another_var
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}
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