Mihai Popa 16ad92ad3c This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-11 09:39:51 +00:00
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AArch64	Change how we iterate over relocations on ELF.	2013-05-30 03:05:14 +00:00
ARM	This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.	2013-06-11 09:39:51 +00:00
AsmParser	Fix a bug in the MC asm parser evaluating expressions. It was treating:	2013-05-07 21:40:58 +00:00
COFF	[mc-coff] Forward Linker Option flags into the .drectve section	2013-04-25 19:34:41 +00:00
Disassembler	This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.	2013-06-11 09:39:51 +00:00
ELF	Don't hide the first ELF symbol.	2013-06-05 20:33:54 +00:00
MachO
Markup
MBlaze
Mips	Change how we iterate over relocations on ELF.	2013-05-30 03:05:14 +00:00
PowerPC	[PowerPC] Support extended sc mnemonic	2013-06-10 17:19:43 +00:00
SystemZ	[SystemZ] Immediate compare-and-branch support	2013-05-29 11:58:52 +00:00
X86	[ms-inline asm] Fix a crasher when we fail on a direct match.	2013-05-10 18:24:17 +00:00