llvm-6502/test/MC
Rafael Espindola 82759c6cac Reorganize the x86 ELF relocation selection logic.
The main differences are:

* Split in 32 and 64 bit functions.
* First switch on the Modifier so that we have only one non fully covered
  switch.
* Map the fixup kind first to a x86_64 (or i386) specific enum, to make
  it easy to handle cases like X86::reloc_riprel_4byte_movq_load.
* Switch on IsPCRel last, which reduces code duplication.

Fixes pr22308.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 19:48:54 +00:00
..
AArch64
ARM
AsmParser Add support for .ifnes psuedo-op. 2015-03-18 14:20:54 +00:00
COFF
Disassembler
ELF Reorganize the x86 ELF relocation selection logic. 2015-03-20 19:48:54 +00:00
Hexagon
MachO
Markup
Mips [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. 2015-03-17 13:17:44 +00:00
PowerPC
R600
Sparc
SystemZ
X86