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https://github.com/c64scene-ar/llvm-6502.git
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8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
108 lines
2.8 KiB
LLVM
108 lines
2.8 KiB
LLVM
; Test selection of addresses with indices in cases where the address
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; is used once.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; A simple index address.
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define void @f1(i64 %addr, i64 %index) {
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; CHECK-LABEL: f1:
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; CHECK: lb %r0, 0(%r3,%r2)
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; CHECK: br %r14
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%add = add i64 %addr, %index
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%ptr = inttoptr i64 %add to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; An address with an index and a displacement (order 1).
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define void @f2(i64 %addr, i64 %index) {
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; CHECK-LABEL: f2:
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; CHECK: lb %r0, 100(%r3,%r2)
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; CHECK: br %r14
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%add1 = add i64 %addr, %index
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%add2 = add i64 %add1, 100
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%ptr = inttoptr i64 %add2 to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; An address with an index and a displacement (order 2).
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define void @f3(i64 %addr, i64 %index) {
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; CHECK-LABEL: f3:
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; CHECK: lb %r0, 100(%r3,%r2)
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; CHECK: br %r14
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%add1 = add i64 %addr, 100
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%add2 = add i64 %add1, %index
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%ptr = inttoptr i64 %add2 to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; An address with an index and a subtracted displacement (order 1).
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define void @f4(i64 %addr, i64 %index) {
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; CHECK-LABEL: f4:
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; CHECK: lb %r0, -100(%r3,%r2)
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; CHECK: br %r14
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%add1 = add i64 %addr, %index
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%add2 = sub i64 %add1, 100
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%ptr = inttoptr i64 %add2 to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; An address with an index and a subtracted displacement (order 2).
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define void @f5(i64 %addr, i64 %index) {
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; CHECK-LABEL: f5:
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; CHECK: lb %r0, -100(%r3,%r2)
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; CHECK: br %r14
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%add1 = sub i64 %addr, 100
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%add2 = add i64 %add1, %index
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%ptr = inttoptr i64 %add2 to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; An address with an index and a displacement added using OR.
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define void @f6(i64 %addr, i64 %index) {
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; CHECK-LABEL: f6:
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; CHECK: risbg [[BASE:%r[1245]]], %r2, 0, 188, 0
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; CHECK: lb %r0, 6(%r3,[[BASE]])
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; CHECK: br %r14
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%aligned = and i64 %addr, -8
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%or = or i64 %aligned, 6
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%add = add i64 %or, %index
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%ptr = inttoptr i64 %add to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; Like f6, but without the masking. This OR doesn't count as a displacement.
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define void @f7(i64 %addr, i64 %index) {
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; CHECK-LABEL: f7:
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; CHECK: oill %r2, 6
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; CHECK: lb %r0, 0(%r3,%r2)
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; CHECK: br %r14
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%or = or i64 %addr, 6
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%add = add i64 %or, %index
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%ptr = inttoptr i64 %add to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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; Like f6, but with the OR applied after the index. We don't know anything
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; about the alignment of %add here.
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define void @f8(i64 %addr, i64 %index) {
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; CHECK-LABEL: f8:
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; CHECK: risbg [[BASE:%r[1245]]], %r2, 0, 188, 0
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; CHECK: agr [[BASE]], %r3
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; CHECK: oill [[BASE]], 6
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; CHECK: lb %r0, 0([[BASE]])
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; CHECK: br %r14
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%aligned = and i64 %addr, -8
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%add = add i64 %aligned, %index
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%or = or i64 %add, 6
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%ptr = inttoptr i64 %or to i8 *
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%a = load volatile i8 *%ptr
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ret void
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}
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