mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-03 15:29:28 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
133 lines
3.8 KiB
LLVM
133 lines
3.8 KiB
LLVM
; Test 16-bit atomic ORs.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
|
|
|
|
; Check OR of a variable.
|
|
; - CHECK is for the main loop.
|
|
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
|
|
; RLL is set up correctly. The negation is independent of the NILL and L
|
|
; tested in CHECK.
|
|
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
|
|
; before being used. This shift is independent of the other loop prologue
|
|
; instructions.
|
|
define i16 @f1(i16 *%src, i16 %b) {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
|
|
; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
|
|
; CHECK: [[LABEL:\.[^:]*]]:
|
|
; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
|
|
; CHECK: or [[ROT]], %r3
|
|
; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
|
|
; CHECK: cs [[OLD]], [[NEW]], 0([[BASE]])
|
|
; CHECK: jlh [[LABEL]]
|
|
; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f1:
|
|
; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
|
|
; CHECK-SHIFT1: rll
|
|
; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
|
|
; CHECK-SHIFT1: rll
|
|
; CHECK-SHIFT1: br %r14
|
|
;
|
|
; CHECK-SHIFT2-LABEL: f1:
|
|
; CHECK-SHIFT2: sll %r3, 16
|
|
; CHECK-SHIFT2: rll
|
|
; CHECK-SHIFT2: or {{%r[0-9]+}}, %r3
|
|
; CHECK-SHIFT2: rll
|
|
; CHECK-SHIFT2: rll
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check the minimum signed value. We OR the rotated word with 0x80000000.
|
|
define i16 @f2(i16 *%src) {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
|
|
; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
|
|
; CHECK: [[LABEL:\.[^:]*]]:
|
|
; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
|
|
; CHECK: oilh [[ROT]], 32768
|
|
; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
|
|
; CHECK: cs [[OLD]], [[NEW]], 0([[BASE]])
|
|
; CHECK: jlh [[LABEL]]
|
|
; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f2:
|
|
; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
|
|
; CHECK-SHIFT1: rll
|
|
; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
|
|
; CHECK-SHIFT1: rll
|
|
; CHECK-SHIFT1: br %r14
|
|
;
|
|
; CHECK-SHIFT2-LABEL: f2:
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 -32768 seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check ORs of -2 (-1 isn't useful). We OR the rotated word with 0xfffe0000.
|
|
define i16 @f3(i16 *%src) {
|
|
; CHECK-LABEL: f3:
|
|
; CHECK: oilh [[ROT]], 65534
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f3:
|
|
; CHECK-SHIFT1: br %r14
|
|
; CHECK-SHIFT2-LABEL: f3:
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 -2 seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check ORs of 1. We OR the rotated word with 0x00010000.
|
|
define i16 @f4(i16 *%src) {
|
|
; CHECK-LABEL: f4:
|
|
; CHECK: oilh [[ROT]], 1
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f4:
|
|
; CHECK-SHIFT1: br %r14
|
|
; CHECK-SHIFT2-LABEL: f4:
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 1 seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check the maximum signed value. We OR the rotated word with 0x7fff0000.
|
|
define i16 @f5(i16 *%src) {
|
|
; CHECK-LABEL: f5:
|
|
; CHECK: oilh [[ROT]], 32767
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f5:
|
|
; CHECK-SHIFT1: br %r14
|
|
; CHECK-SHIFT2-LABEL: f5:
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 32767 seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check ORs of a large unsigned value. We OR the rotated word with
|
|
; 0xfffd0000.
|
|
define i16 @f6(i16 *%src) {
|
|
; CHECK-LABEL: f6:
|
|
; CHECK: oilh [[ROT]], 65533
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT1-LABEL: f6:
|
|
; CHECK-SHIFT1: br %r14
|
|
; CHECK-SHIFT2-LABEL: f6:
|
|
; CHECK-SHIFT2: br %r14
|
|
%res = atomicrmw or i16 *%src, i16 65533 seq_cst
|
|
ret i16 %res
|
|
}
|