mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-24 09:29:42 +00:00
a558232f85
This "itinerary class map" in PPCSchedule.td is incomplete and redundant with the actual code. As it provides no value, we've decided to remove it. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231246 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
4.7 KiB
TableGen
127 lines
4.7 KiB
TableGen
//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Instruction Itinerary classes used for PowerPC
|
|
//
|
|
def IIC_IntSimple : InstrItinClass;
|
|
def IIC_IntGeneral : InstrItinClass;
|
|
def IIC_IntCompare : InstrItinClass;
|
|
def IIC_IntISEL : InstrItinClass;
|
|
def IIC_IntDivD : InstrItinClass;
|
|
def IIC_IntDivW : InstrItinClass;
|
|
def IIC_IntMFFS : InstrItinClass;
|
|
def IIC_IntMFVSCR : InstrItinClass;
|
|
def IIC_IntMTFSB0 : InstrItinClass;
|
|
def IIC_IntMTSRD : InstrItinClass;
|
|
def IIC_IntMulHD : InstrItinClass;
|
|
def IIC_IntMulHW : InstrItinClass;
|
|
def IIC_IntMulHWU : InstrItinClass;
|
|
def IIC_IntMulLI : InstrItinClass;
|
|
def IIC_IntRFID : InstrItinClass;
|
|
def IIC_IntRotateD : InstrItinClass;
|
|
def IIC_IntRotateDI : InstrItinClass;
|
|
def IIC_IntRotate : InstrItinClass;
|
|
def IIC_IntShift : InstrItinClass;
|
|
def IIC_IntTrapD : InstrItinClass;
|
|
def IIC_IntTrapW : InstrItinClass;
|
|
def IIC_BrB : InstrItinClass;
|
|
def IIC_BrCR : InstrItinClass;
|
|
def IIC_BrMCR : InstrItinClass;
|
|
def IIC_BrMCRX : InstrItinClass;
|
|
def IIC_LdStDCBA : InstrItinClass;
|
|
def IIC_LdStDCBF : InstrItinClass;
|
|
def IIC_LdStDCBI : InstrItinClass;
|
|
def IIC_LdStLoad : InstrItinClass;
|
|
def IIC_LdStLoadUpd : InstrItinClass;
|
|
def IIC_LdStLoadUpdX : InstrItinClass;
|
|
def IIC_LdStStore : InstrItinClass;
|
|
def IIC_LdStStoreUpd : InstrItinClass;
|
|
def IIC_LdStDSS : InstrItinClass;
|
|
def IIC_LdStICBI : InstrItinClass;
|
|
def IIC_LdStLD : InstrItinClass;
|
|
def IIC_LdStLDU : InstrItinClass;
|
|
def IIC_LdStLDUX : InstrItinClass;
|
|
def IIC_LdStLDARX : InstrItinClass;
|
|
def IIC_LdStLFD : InstrItinClass;
|
|
def IIC_LdStLFDU : InstrItinClass;
|
|
def IIC_LdStLFDUX : InstrItinClass;
|
|
def IIC_LdStLHA : InstrItinClass;
|
|
def IIC_LdStLHAU : InstrItinClass;
|
|
def IIC_LdStLHAUX : InstrItinClass;
|
|
def IIC_LdStLMW : InstrItinClass;
|
|
def IIC_LdStLVecX : InstrItinClass;
|
|
def IIC_LdStLWA : InstrItinClass;
|
|
def IIC_LdStLWARX : InstrItinClass;
|
|
def IIC_LdStSLBIA : InstrItinClass;
|
|
def IIC_LdStSLBIE : InstrItinClass;
|
|
def IIC_LdStSTD : InstrItinClass;
|
|
def IIC_LdStSTDCX : InstrItinClass;
|
|
def IIC_LdStSTDU : InstrItinClass;
|
|
def IIC_LdStSTDUX : InstrItinClass;
|
|
def IIC_LdStSTFD : InstrItinClass;
|
|
def IIC_LdStSTFDU : InstrItinClass;
|
|
def IIC_LdStSTVEBX : InstrItinClass;
|
|
def IIC_LdStSTWCX : InstrItinClass;
|
|
def IIC_LdStSync : InstrItinClass;
|
|
def IIC_SprISYNC : InstrItinClass;
|
|
def IIC_SprMFSR : InstrItinClass;
|
|
def IIC_SprMTMSR : InstrItinClass;
|
|
def IIC_SprMTSR : InstrItinClass;
|
|
def IIC_SprTLBSYNC : InstrItinClass;
|
|
def IIC_SprMFCR : InstrItinClass;
|
|
def IIC_SprMFCRF : InstrItinClass;
|
|
def IIC_SprMFMSR : InstrItinClass;
|
|
def IIC_SprMFSPR : InstrItinClass;
|
|
def IIC_SprMFTB : InstrItinClass;
|
|
def IIC_SprMTSPR : InstrItinClass;
|
|
def IIC_SprMTSRIN : InstrItinClass;
|
|
def IIC_SprRFI : InstrItinClass;
|
|
def IIC_SprSC : InstrItinClass;
|
|
def IIC_FPGeneral : InstrItinClass;
|
|
def IIC_FPAddSub : InstrItinClass;
|
|
def IIC_FPCompare : InstrItinClass;
|
|
def IIC_FPDivD : InstrItinClass;
|
|
def IIC_FPDivS : InstrItinClass;
|
|
def IIC_FPFused : InstrItinClass;
|
|
def IIC_FPRes : InstrItinClass;
|
|
def IIC_FPSqrtD : InstrItinClass;
|
|
def IIC_FPSqrtS : InstrItinClass;
|
|
def IIC_VecGeneral : InstrItinClass;
|
|
def IIC_VecFP : InstrItinClass;
|
|
def IIC_VecFPCompare : InstrItinClass;
|
|
def IIC_VecComplex : InstrItinClass;
|
|
def IIC_VecPerm : InstrItinClass;
|
|
def IIC_VecFPRound : InstrItinClass;
|
|
def IIC_VecVSL : InstrItinClass;
|
|
def IIC_VecVSR : InstrItinClass;
|
|
def IIC_SprMTMSRD : InstrItinClass;
|
|
def IIC_SprSLIE : InstrItinClass;
|
|
def IIC_SprSLBIE : InstrItinClass;
|
|
def IIC_SprSLBMTE : InstrItinClass;
|
|
def IIC_SprSLBMFEE : InstrItinClass;
|
|
def IIC_SprSLBIA : InstrItinClass;
|
|
def IIC_SprTLBIA : InstrItinClass;
|
|
def IIC_SprTLBIEL : InstrItinClass;
|
|
def IIC_SprTLBIE : InstrItinClass;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Processor instruction itineraries.
|
|
|
|
include "PPCScheduleG3.td"
|
|
include "PPCSchedule440.td"
|
|
include "PPCScheduleG4.td"
|
|
include "PPCScheduleG4Plus.td"
|
|
include "PPCScheduleG5.td"
|
|
include "PPCScheduleP7.td"
|
|
include "PPCScheduleP8.td"
|
|
include "PPCScheduleA2.td"
|
|
include "PPCScheduleE500mc.td"
|
|
include "PPCScheduleE5500.td"
|