Tom Stellard ba150ed636 R600/SI: Remove isel mubuf legalization ... We legalize mubuf instructions post-instruction selection, so this code is no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230352 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-24 17:59:19 +00:00
..
AsmParser
InstPrinter	R600/SI: Fix mad*k definitions	2015-02-21 21:29:00 +00:00
MCTargetDesc	Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.	2015-02-19 11:38:11 +00:00
TargetInfo
AMDGPU.h	[PM] Remove a bunch of stale TTI creation method declarations. I nuked	2015-02-01 00:22:15 +00:00
AMDGPU.td	R600/SI: Set noNamedPositionallyEncodedOperands	2015-02-18 02:15:32 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp	Grab the subtarget off of the machine function for the R600	2015-02-19 01:10:53 +00:00
AMDGPUAsmPrinter.h	Remove the DisasmEnabled AsmPrinter variable and just look it	2015-02-19 01:10:49 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	Make helper functions/classes/globals static. NFC.	2015-02-06 17:51:54 +00:00
AMDGPUInstrInfo.h	R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2	2015-02-03 17:37:57 +00:00
AMDGPUInstrInfo.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUInstructions.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp	R600/SI: Use complex operand folding for div_scale	2015-02-14 04:24:28 +00:00
AMDGPUISelLowering.cpp	R600/SI: Remove v_sub_f64 pseudo	2015-02-20 22:10:45 +00:00
AMDGPUISelLowering.h	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUMachineFunction.cpp	R600: Canonicalize access to function attributes, NFC	2015-02-14 02:45:45 +00:00
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	Grab the subtarget off of the machine function for the R600	2015-02-19 01:10:53 +00:00
AMDGPUMCInstLower.h	R600/SI: Don't shrink instructions whose e32 encoding doesn't exist	2015-01-15 18:42:51 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	80-column fixups.	2015-02-19 00:15:33 +00:00
AMDGPUSubtarget.h	R600/SI: Disable subreg liveness	2015-02-11 18:24:53 +00:00
AMDGPUTargetMachine.cpp	[PM] Remove the old 'PassManager.h' header file at the top level of	2015-02-13 10:01:29 +00:00
AMDGPUTargetMachine.h	R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig	2015-02-11 17:11:51 +00:00
AMDGPUTargetTransformInfo.cpp	R600/SI: Fix bug in TTI loop unrolling preferences	2015-02-05 15:32:18 +00:00
AMDGPUTargetTransformInfo.h	[multiversion] Remove the function parameter from the unrolling	2015-02-01 14:31:23 +00:00
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
CaymanInstructions.td	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
CIInstructions.td	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
CMakeLists.txt	R600/SI: Spill VGPRs to scratch space for compute shaders	2015-01-14 15:42:31 +00:00
EvergreenInstructions.td	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
LLVMBuild.txt
Makefile
Processors.td	R600/SI: Add subtarget feature for if f32 fma is fast	2015-01-29 19:34:25 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	Prefer SmallVector::append/insert over push_back loops.	2015-02-17 15:29:18 +00:00
R600ISelLowering.h	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp	Remove a few more calls to TargetMachine::getSubtarget from the	2015-02-19 01:10:55 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
SIAnnotateControlFlow.cpp	R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers	2015-02-05 15:32:15 +00:00
SIDefines.h	R600/SI: Also enable WQM for image opcodes which calculate LOD v3	2015-02-06 02:51:20 +00:00
SIFixSGPRCopies.cpp	R600/SI: Remove VReg_32 register class	2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp	R600/SI: Fix asam errors in SIFoldOperands	2015-02-17 20:11:54 +00:00
SIInsertWaits.cpp	R600/SI: Fix dependency between instruction writing M0 and S_SENDMSG on VI (v2)	2015-02-03 17:37:52 +00:00
SIInstrFormats.td	R600/SI: Fix mad*k definitions	2015-02-21 21:29:00 +00:00
SIInstrInfo.cpp	R600/SI: Use v_madmk_f32	2015-02-21 21:29:10 +00:00
SIInstrInfo.h	R600/SI: Try to use v_madak_f32	2015-02-21 21:29:07 +00:00
SIInstrInfo.td	R600/SI: Fix mad*k definitions	2015-02-21 21:29:00 +00:00
SIInstructions.td	R600/SI: Fix mad*k definitions	2015-02-21 21:29:00 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Remove isel mubuf legalization	2015-02-24 17:59:19 +00:00
SIISelLowering.h	R600/SI: Remove isel mubuf legalization	2015-02-24 17:59:19 +00:00
SILoadStoreOptimizer.cpp	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
SILowerControlFlow.cpp	R600/SI: Don't enable WQM for V_INTERP_* instructions v2	2015-02-06 02:51:25 +00:00
SILowerI1Copies.cpp	R600/SI: Remove VReg_32 register class	2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp	Remove a few more calls to TargetMachine::getSubtarget from the	2015-02-19 01:10:55 +00:00
SIMachineFunctionInfo.h	R600/SI: Add subtarget feature to enable VGPR spilling for all shader types	2015-01-20 19:33:04 +00:00
SIPrepareScratchRegs.cpp	R600/SI: Fix simple-loop.ll test	2015-01-20 19:33:02 +00:00
SIRegisterInfo.cpp	R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2	2015-02-03 17:37:57 +00:00
SIRegisterInfo.h	R600/SI: Define a schedule model and enable the generic machine scheduler	2015-01-29 16:55:25 +00:00
SIRegisterInfo.td	R600/SI: Really fix size of VReg_1	2015-02-14 03:54:32 +00:00
SISchedule.td	R600/SI: Define a schedule model	2015-01-14 01:13:19 +00:00
SIShrinkInstructions.cpp	R600/SI: Allow f64 inline immediates in i64 operands	2015-02-13 19:05:03 +00:00
SITypeRewriter.cpp	R600: Canonicalize access to function attributes, NFC	2015-02-14 02:45:45 +00:00
VIInstrFormats.td	R600/SI: Rename dst encoding field to be consistent with docs	2015-02-18 02:15:37 +00:00
VIInstructions.td	R600/SI: Add VI versions of MUBUF loads and stores	2015-01-27 17:24:58 +00:00