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d950941e13
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
238 lines
7.7 KiB
C++
238 lines
7.7 KiB
C++
//===-- BlackfinAsmPrinter.cpp - Blackfin LLVM assembly writer ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format BLACKFIN assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "Blackfin.h"
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#include "BlackfinInstrInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetRegistry.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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class VISIBILITY_HIDDEN BlackfinAsmPrinter : public AsmPrinter {
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public:
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BlackfinAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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const TargetAsmInfo *TAI, bool V)
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: AsmPrinter(O, TM, TAI, V) {}
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virtual const char *getPassName() const {
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return "Blackfin Assembly Printer";
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}
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void printOperand(const MachineInstr *MI, int opNum);
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void printMemoryOperand(const MachineInstr *MI, int opNum);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void emitLinkage(const std::string &n, GlobalValue::LinkageTypes l);
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bool runOnMachineFunction(MachineFunction &F);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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void PrintGlobalVariable(const GlobalVariable* GVar);
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};
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} // end of anonymous namespace
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#include "BlackfinGenAsmWriter.inc"
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extern "C" void LLVMInitializeBlackfinAsmPrinter() {
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RegisterAsmPrinter<BlackfinAsmPrinter> X(TheBlackfinTarget);
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}
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void BlackfinAsmPrinter::emitLinkage(const std::string &name,
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GlobalValue::LinkageTypes l) {
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switch (l) {
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default: llvm_unreachable("Unknown linkage type!");
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case GlobalValue::InternalLinkage: // Symbols default to internal.
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case GlobalValue::PrivateLinkage:
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case GlobalValue::LinkerPrivateLinkage:
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break;
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case GlobalValue::ExternalLinkage:
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O << TAI->getGlobalDirective() << name << "\n";
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break;
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case GlobalValue::LinkOnceAnyLinkage:
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case GlobalValue::LinkOnceODRLinkage:
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case GlobalValue::WeakAnyLinkage:
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case GlobalValue::WeakODRLinkage:
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O << TAI->getGlobalDirective() << name << "\n";
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O << TAI->getWeakDefDirective() << name << "\n";
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break;
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}
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}
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void BlackfinAsmPrinter::PrintGlobalVariable(const GlobalVariable* GV) {
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const TargetData *TD = TM.getTargetData();
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if (!GV->hasInitializer() || EmitSpecialLLVMGlobal(GV))
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return;
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std::string name = Mang->getMangledName(GV);
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Constant *C = GV->getInitializer();
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SwitchToSection(getObjFileLowering().SectionForGlobal(GV, Mang, TM));
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emitLinkage(name, GV->getLinkage());
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EmitAlignment(TD->getPreferredAlignmentLog(GV), GV);
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printVisibility(name, GV->getVisibility());
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O << "\t.type " << name << ", STT_OBJECT\n";
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O << "\t.size " << name << ',' << TD->getTypeAllocSize(C->getType()) << '\n';
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O << name << ":\n";
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EmitGlobalConstant(C);
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}
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/// runOnMachineFunction - This uses the printInstruction()
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/// method to print assembly for each instruction.
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///
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bool BlackfinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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EmitConstantPool(MF.getConstantPool());
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EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
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const Function *F = MF.getFunction();
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SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM));
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EmitAlignment(2, F);
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emitLinkage(CurrentFnName, F->getLinkage());
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printVisibility(CurrentFnName, F->getVisibility());
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O << "\t.type\t" << CurrentFnName << ", STT_FUNC\n"
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<< CurrentFnName << ":\n";
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if (DW)
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DW->BeginFunction(&MF);
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) {
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// This is an entry block or a block that's only reachable via a
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// fallthrough edge. In non-VerboseAsm mode, don't print the label.
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} else {
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printBasicBlockLabel(I, true, true, VerboseAsm);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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printInstruction(II);
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++EmittedInsts;
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}
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}
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O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
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if (DW)
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DW->EndFunction(&MF);
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return false;
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}
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void BlackfinAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand (opNum);
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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assert (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Virtual registers should be already mapped!");
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O << RI.get(MO.getReg()).AsmName;
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break;
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case MachineOperand::MO_Immediate:
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O << MO.getImm();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMBB(), false, false, false);
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return;
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case MachineOperand::MO_GlobalAddress:
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O << Mang->getMangledName(MO.getGlobal());
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printOffset(MO.getOffset());
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << Mang->makeNameProper(MO.getSymbolName());
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
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<< MO.getIndex();
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break;
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case MachineOperand::MO_JumpTableIndex:
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O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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break;
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default:
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llvm_unreachable("<unknown operand type>");
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break;
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}
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}
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void BlackfinAsmPrinter::printMemoryOperand(const MachineInstr *MI, int opNum) {
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printOperand(MI, opNum);
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if (MI->getOperand(opNum+1).isImm() && MI->getOperand(opNum+1).getImm() == 0)
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return;
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O << " + ";
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printOperand(MI, opNum+1);
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool BlackfinAsmPrinter::PrintAsmOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'r':
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break;
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}
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}
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printOperand(MI, OpNo);
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return false;
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}
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bool BlackfinAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier
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O << '[';
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printOperand(MI, OpNo);
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O << ']';
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return false;
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}
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