llvm-6502/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
Richard Sandiford af2a1bebfc [SystemZ] Tighten branch tests
After r182274, the branches in these tests must always be short.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-21 08:53:17 +00:00

78 lines
1.9 KiB
LLVM

; Test 64-bit atomic XORs.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Check XORs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
; CHECK: lgr %r0, %r2
; CHECK: xgr %r0, %r4
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jlh [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 %b seq_cst
ret i64 %res
}
; Check the lowest useful XILF value.
define i64 @f2(i64 %dummy, i64 *%src) {
; CHECK: f2:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
; CHECK: lgr %r0, %r2
; CHECK: xilf %r0, 1
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jlh [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 1 seq_cst
ret i64 %res
}
; Check the high end of the XILF range.
define i64 @f3(i64 %dummy, i64 *%src) {
; CHECK: f3:
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 4294967295 seq_cst
ret i64 %res
}
; Check the lowest useful XIHF value, which is one greater than above.
define i64 @f4(i64 %dummy, i64 *%src) {
; CHECK: f4:
; CHECK: xihf %r0, 1
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 4294967296 seq_cst
ret i64 %res
}
; Check the next value up, which must use a register. (We could use
; combinations of XIH* and XIL* instead, but that isn't implemented.)
define i64 @f5(i64 %dummy, i64 *%src) {
; CHECK: f5:
; CHECK: xgr
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 4294967297 seq_cst
ret i64 %res
}
; Check the high end of the XIHF range.
define i64 @f6(i64 %dummy, i64 *%src) {
; CHECK: f6:
; CHECK: xihf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 -4294967296 seq_cst
ret i64 %res
}
; Check the next value up, which must use a register.
define i64 @f7(i64 %dummy, i64 *%src) {
; CHECK: f7:
; CHECK: xgr
; CHECK: br %r14
%res = atomicrmw xor i64 *%src, i64 -4294967295 seq_cst
ret i64 %res
}