mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-09 15:57:28 +00:00
47734db936
This is another prerequisite for frame-to-frame MVC copies. I'll commit the patch that makes use of the slot separately. The downside of trying to test many corner cases with each of the available addressing modes is that a fair few tests need to account for the new frame layout. I do still think it's useful to have all these tests though, since it's something that wouldn't get much coverage otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185698 91177308-0d34-0410-b5e6-96231b3b80d8
278 lines
8.9 KiB
LLVM
278 lines
8.9 KiB
LLVM
; Test the saving and restoring of GPRs in large frames.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; This is the largest frame size that can use a plain LMG for %r6 and above.
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; It is big enough to require two emergency spill slots at 160(%r15),
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; so get a frame of size 524232 by allocating (524232 - 176) / 8 = 65507
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; extra doublewords.
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define void @f1(i32 *%ptr, i64 %x) {
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; CHECK: f1:
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; CHECK: stmg %r6, %r15, 48(%r15)
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; CHECK: .cfi_offset %r6, -112
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; CHECK: .cfi_offset %r7, -104
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; CHECK: .cfi_offset %r8, -96
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; CHECK: .cfi_offset %r9, -88
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; CHECK: .cfi_offset %r10, -80
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; CHECK: .cfi_offset %r11, -72
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; CHECK: .cfi_offset %r12, -64
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; CHECK: .cfi_offset %r13, -56
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -524232
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; CHECK: .cfi_def_cfa_offset 524392
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; ...main function body...
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; CHECK-NOT: ag
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; CHECK: lmg %r6, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l6 = load volatile i32 *%ptr
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%l7 = load volatile i32 *%ptr
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%l8 = load volatile i32 *%ptr
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%l9 = load volatile i32 *%ptr
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%l10 = load volatile i32 *%ptr
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%l11 = load volatile i32 *%ptr
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%l12 = load volatile i32 *%ptr
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%l13 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add6 = add i32 %l6, %add5
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%add7 = add i32 %l7, %add6
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%add8 = add i32 %l8, %add7
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%add9 = add i32 %l9, %add8
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%add10 = add i32 %l10, %add9
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%add11 = add i32 %l11, %add10
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%add12 = add i32 %l12, %add11
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%add13 = add i32 %l13, %add12
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%add14 = add i32 %l14, %add13
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add6, i32 *%ptr
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store volatile i32 %add7, i32 *%ptr
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store volatile i32 %add8, i32 *%ptr
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store volatile i32 %add9, i32 *%ptr
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store volatile i32 %add10, i32 *%ptr
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store volatile i32 %add11, i32 *%ptr
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store volatile i32 %add12, i32 *%ptr
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store volatile i32 %add13, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [65507 x i64], align 8
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%entry = getelementptr inbounds [65507 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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; This is the largest frame size that can use a plain LMG for %r14 and above
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; It is big enough to require two emergency spill slots at 160(%r15),
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; so get a frame of size 524168 by allocating (524168 - 176) / 8 = 65499
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; extra doublewords.
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define void @f2(i32 *%ptr, i64 %x) {
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; CHECK: f2:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -524168
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; CHECK: .cfi_def_cfa_offset 524328
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; ...main function body...
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; CHECK-NOT: ag
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; CHECK: lmg %r14, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add14 = add i32 %l14, %add5
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [65499 x i64], align 8
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%entry = getelementptr inbounds [65499 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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; Like f1 but with a frame that is 8 bytes bigger. This is the smallest
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; frame size that needs two instructions to perform the final LMG for
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; %r6 and above.
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define void @f3(i32 *%ptr, i64 %x) {
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; CHECK: f3:
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; CHECK: stmg %r6, %r15, 48(%r15)
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; CHECK: .cfi_offset %r6, -112
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; CHECK: .cfi_offset %r7, -104
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; CHECK: .cfi_offset %r8, -96
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; CHECK: .cfi_offset %r9, -88
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; CHECK: .cfi_offset %r10, -80
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; CHECK: .cfi_offset %r11, -72
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; CHECK: .cfi_offset %r12, -64
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; CHECK: .cfi_offset %r13, -56
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -524240
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; CHECK: .cfi_def_cfa_offset 524400
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; ...main function body...
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; CHECK: aghi %r15, 8
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; CHECK: lmg %r6, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l6 = load volatile i32 *%ptr
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%l7 = load volatile i32 *%ptr
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%l8 = load volatile i32 *%ptr
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%l9 = load volatile i32 *%ptr
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%l10 = load volatile i32 *%ptr
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%l11 = load volatile i32 *%ptr
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%l12 = load volatile i32 *%ptr
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%l13 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add6 = add i32 %l6, %add5
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%add7 = add i32 %l7, %add6
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%add8 = add i32 %l8, %add7
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%add9 = add i32 %l9, %add8
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%add10 = add i32 %l10, %add9
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%add11 = add i32 %l11, %add10
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%add12 = add i32 %l12, %add11
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%add13 = add i32 %l13, %add12
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%add14 = add i32 %l14, %add13
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add6, i32 *%ptr
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store volatile i32 %add7, i32 *%ptr
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store volatile i32 %add8, i32 *%ptr
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store volatile i32 %add9, i32 *%ptr
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store volatile i32 %add10, i32 *%ptr
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store volatile i32 %add11, i32 *%ptr
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store volatile i32 %add12, i32 *%ptr
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store volatile i32 %add13, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [65508 x i64], align 8
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%entry = getelementptr inbounds [65508 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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; Like f2 but with a frame that is 8 bytes bigger. This is the smallest
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; frame size that needs two instructions to perform the final LMG for
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; %r14 and %r15.
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define void @f4(i32 *%ptr, i64 %x) {
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; CHECK: f4:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -524176
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; CHECK: .cfi_def_cfa_offset 524336
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; ...main function body...
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; CHECK: aghi %r15, 8
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; CHECK: lmg %r14, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add14 = add i32 %l14, %add5
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [65500 x i64], align 8
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%entry = getelementptr inbounds [65500 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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; This is the largest frame size for which the prepatory increment for
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; "lmg %r14, %r15, ..." can be done using AGHI.
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define void @f5(i32 *%ptr, i64 %x) {
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; CHECK: f5:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -556928
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; CHECK: .cfi_def_cfa_offset 557088
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; ...main function body...
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; CHECK: aghi %r15, 32760
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; CHECK: lmg %r14, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add14 = add i32 %l14, %add5
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [69594 x i64], align 8
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%entry = getelementptr inbounds [69594 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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; This is the smallest frame size for which the prepatory increment for
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; "lmg %r14, %r15, ..." needs to be done using AGFI.
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define void @f6(i32 *%ptr, i64 %x) {
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; CHECK: f6:
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; CHECK: stmg %r14, %r15, 112(%r15)
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; CHECK: .cfi_offset %r14, -48
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; CHECK: .cfi_offset %r15, -40
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; CHECK: agfi %r15, -556936
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; CHECK: .cfi_def_cfa_offset 557096
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; ...main function body...
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; CHECK: agfi %r15, 32768
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; CHECK: lmg %r14, %r15, 524280(%r15)
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; CHECK: br %r14
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%l0 = load volatile i32 *%ptr
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%l1 = load volatile i32 *%ptr
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%l4 = load volatile i32 *%ptr
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%l5 = load volatile i32 *%ptr
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%l14 = load volatile i32 *%ptr
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%add0 = add i32 %l0, %l0
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%add1 = add i32 %l1, %add0
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%add4 = add i32 %l4, %add1
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%add5 = add i32 %l5, %add4
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%add14 = add i32 %l14, %add5
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store volatile i32 %add0, i32 *%ptr
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store volatile i32 %add1, i32 *%ptr
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store volatile i32 %add4, i32 *%ptr
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store volatile i32 %add5, i32 *%ptr
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store volatile i32 %add14, i32 *%ptr
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%y = alloca [69595 x i64], align 8
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%entry = getelementptr inbounds [69595 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %entry
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ret void
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}
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