mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-15 20:06:46 +00:00
d50bcb2162
This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
118 lines
3.1 KiB
LLVM
118 lines
3.1 KiB
LLVM
; Test 64-bit signed comparison in which the second operand is a variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check CGR.
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define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
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; CHECK: f1:
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; CHECK: cgrjl %r2, %r3
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check CG with no displacement.
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define double @f2(double %a, double %b, i64 %i1, i64 *%ptr) {
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; CHECK: f2:
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; CHECK: cg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the aligned CG range.
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define double @f3(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK: f3:
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; CHECK: cg %r2, 524280(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65535
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f4(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: cg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65536
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the negative aligned CG range.
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define double @f5(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK: f5:
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; CHECK: cg %r2, -8(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -1
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the low end of the CG range.
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define double @f6(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK: f6:
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; CHECK: cg %r2, -524288(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65536
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f7(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK: f7:
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; CHECK: agfi %r3, -524296
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; CHECK: cg %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65537
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CG allows an index.
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define double @f8(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
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; CHECK: f8:
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; CHECK: cg %r2, 524280({{%r4,%r3|%r3,%r4}})
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 524280
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%ptr = inttoptr i64 %add2 to i64 *
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%i2 = load i64 *%ptr
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%cond = icmp slt i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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