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5427edeb68
when determining validity of matching constraint. Allow i1 types access to the GR8 reg class for x86. Fixes PR10352 and rdar://9777108 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=x86
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define i32 @test1() nounwind {
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; Dest is AX, dest type = i32.
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%tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"()
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ret i32 %tmp4
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}
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define void @test2(i32 %V) nounwind {
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; input is AX, in type = i32.
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call void asm sideeffect "FROB $0", "{ax}"(i32 %V)
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ret void
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}
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define void @test3() nounwind {
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; FP constant as a memory operand.
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tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000)
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ret void
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}
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define void @test4() nounwind {
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; J means a constant in range 0 to 63.
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tail call void asm sideeffect "bork $0", "J"(i32 37) nounwind
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ret void
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}
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; rdar://9738585
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define i32 @test5() nounwind {
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entry:
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%0 = tail call i32 asm "test", "=l,~{dirflag},~{fpsr},~{flags}"() nounwind
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ret i32 0
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}
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; rdar://9777108 PR10352
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define void @test6(i1 zeroext %desired) nounwind {
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entry:
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tail call void asm sideeffect "foo $0", "q,~{dirflag},~{fpsr},~{flags}"(i1 %desired) nounwind
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ret void
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}
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define void @test7(i1 zeroext %desired, i32* %p) nounwind {
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entry:
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%0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %p, i1 %desired) nounwind
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ret void
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}
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