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https://github.com/c64scene-ar/llvm-6502.git
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Summary: This patch (correctly) breaks some MSA tests by exposing the cases when SelectionDAG::getConstant() produces illegal types. These have been temporarily marked XFAIL and the XFAIL flag will be removed when SelectionDAG::getConstant() is fixed. There are three categories of failure: * Immediate instructions are not selected in one endian mode. * Immediates used in ldi.[bhwd] must be different according to endianness. (this only affects cases where the 'wrong' ldi is used to load the correct bitpattern. E.g. (bitcast:v2i64 (build_vector:v4i32 ...))) * Non-immediate instructions that rely on immediates affected by the previous two categories as part of their match pattern. For example, the bset match pattern is the vector equivalent of 'ws | (1 << wt)'. One test needed correcting to expect different output depending on whether big or little endian was in use. This test was test/CodeGen/Mips/msa/basic_operations.ll and experiences the second category of failure shown above. The little endian version of this test is named basic_operations_little.ll and will be merged back into basic_operations.ll in a follow up commit now that FileCheck supports multiple check prefixes. Reviewers: bkramer, jacksprat, dsanders Reviewed By: dsanders CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1972 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194806 91177308-0d34-0410-b5e6-96231b3b80d8
140 lines
6.4 KiB
LLVM
140 lines
6.4 KiB
LLVM
; RUN: llc -march=mips < %s
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; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
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; RUN: llc -march=mipsel < %s
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; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
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; This test originally failed for MSA with a
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; `Num < NumOperands && "Invalid child # of SDNode!"' assertion.
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; It should at least successfully build.
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define void @autogen_SD525530439(i8*, i32*, i64*, i32, i64, i8) {
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BB:
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%A4 = alloca i32
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%A3 = alloca double
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%A2 = alloca <1 x double>
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%A1 = alloca <8 x double>
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%A = alloca i64
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%L = load i8* %0
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store i64 33695, i64* %A
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%E = extractelement <4 x i32> zeroinitializer, i32 3
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%Shuff = shufflevector <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 2, i32 0>
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%I = insertelement <4 x i16> zeroinitializer, i16 -11642, i32 0
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%B = lshr <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%ZE = fpext float 0x3B64A2B880000000 to double
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%Sl = select i1 true, i16 -1, i16 -11642
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%L5 = load i8* %0
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store i8 0, i8* %0
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%E6 = extractelement <4 x i32> zeroinitializer, i32 2
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%Shuff7 = shufflevector <8 x i1> zeroinitializer, <8 x i1> zeroinitializer, <8 x i32> <i32 undef, i32 7, i32 9, i32 11, i32 13, i32 15, i32 1, i32 undef>
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%I8 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 3
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%B9 = sub i32 71140, 439732
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%BC = bitcast <2 x i32> <i32 -1, i32 -1> to <2 x float>
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%Sl10 = select i1 true, i32* %1, i32* %1
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%Cmp = icmp sge <8 x i64> zeroinitializer, zeroinitializer
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%L11 = load i32* %Sl10
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store <1 x double> zeroinitializer, <1 x double>* %A2
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%E12 = extractelement <4 x i16> zeroinitializer, i32 0
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%Shuff13 = shufflevector <1 x i64> zeroinitializer, <1 x i64> zeroinitializer, <1 x i32> undef
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%I14 = insertelement <1 x i16> zeroinitializer, i16 %Sl, i32 0
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%B15 = or i16 -1, %E12
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%BC16 = bitcast <4 x i32> zeroinitializer to <4 x float>
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%Sl17 = select i1 true, i64 %4, i64 %4
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%Cmp18 = fcmp ugt float 0xC5ABB1BF80000000, 0x3EEF3D6300000000
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br label %CF75
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CF75: ; preds = %CF75, %BB
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%L19 = load i32* %Sl10
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store i32 %L11, i32* %Sl10
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%E20 = extractelement <4 x i32> zeroinitializer, i32 1
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%Shuff21 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %I8, <4 x i32> <i32 undef, i32 2, i32 4, i32 6>
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%I22 = insertelement <4 x float> %BC16, float 0x3EEF3D6300000000, i32 2
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%B23 = shl i32 71140, 439732
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%ZE24 = fpext <4 x float> %I22 to <4 x double>
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%Sl25 = select i1 %Cmp18, i32 %L11, i32 %L11
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%Cmp26 = icmp ne i32 %E20, %L19
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br i1 %Cmp26, label %CF75, label %CF76
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CF76: ; preds = %CF75
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%L27 = load i32* %Sl10
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store i32 439732, i32* %Sl10
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%E28 = extractelement <4 x i32> %Shuff21, i32 3
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%Shuff29 = shufflevector <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32> <i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 0>
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%I30 = insertelement <8 x i1> %Shuff7, i1 %Cmp18, i32 4
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%Sl31 = select i1 %Cmp18, i32 %3, i32 %B23
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%Cmp32 = icmp ugt i32 0, %3
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br label %CF74
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CF74: ; preds = %CF74, %CF80, %CF78, %CF76
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%L33 = load i64* %2
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store i32 71140, i32* %Sl10
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%E34 = extractelement <4 x i32> zeroinitializer, i32 1
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%Shuff35 = shufflevector <1 x i16> zeroinitializer, <1 x i16> zeroinitializer, <1 x i32> undef
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%I36 = insertelement <4 x i16> zeroinitializer, i16 -11642, i32 0
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%B37 = mul <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, %Shuff29
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%Sl38 = select i1 %Cmp18, double 0.000000e+00, double 0x2BA9DB480DA732C6
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%Cmp39 = icmp sgt i16 -11642, %Sl
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br i1 %Cmp39, label %CF74, label %CF80
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CF80: ; preds = %CF74
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%L40 = load i8* %0
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store i32 0, i32* %Sl10
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%E41 = extractelement <8 x i64> zeroinitializer, i32 1
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%Shuff42 = shufflevector <1 x i16> %I14, <1 x i16> %I14, <1 x i32> undef
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%I43 = insertelement <4 x i16> %I36, i16 -11642, i32 0
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%FC = fptoui float 0x455CA2B080000000 to i16
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%Sl44 = select i1 %Cmp18, i1 %Cmp18, i1 %Cmp39
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br i1 %Sl44, label %CF74, label %CF78
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CF78: ; preds = %CF80
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%L45 = load i32* %Sl10
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store i8 %L5, i8* %0
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%E46 = extractelement <8 x i1> %Shuff7, i32 2
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br i1 %E46, label %CF74, label %CF77
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CF77: ; preds = %CF77, %CF78
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%Shuff47 = shufflevector <4 x i16> %I43, <4 x i16> zeroinitializer, <4 x i32> <i32 5, i32 undef, i32 1, i32 3>
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%I48 = insertelement <1 x i16> %Shuff42, i16 %Sl, i32 0
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%B49 = mul i8 0, %L40
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%FC50 = uitofp i32 %3 to double
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%Sl51 = select i1 %Sl44, i32 %L27, i32 0
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%Cmp52 = icmp sge i8 %B49, 0
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br i1 %Cmp52, label %CF77, label %CF79
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CF79: ; preds = %CF77
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%L53 = load i32* %Sl10
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store i8 %L40, i8* %0
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%E54 = extractelement <4 x i32> zeroinitializer, i32 1
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%Shuff55 = shufflevector <4 x i32> %Shuff21, <4 x i32> %I8, <4 x i32> <i32 4, i32 6, i32 undef, i32 2>
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%I56 = insertelement <4 x i32> zeroinitializer, i32 %Sl51, i32 2
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%Tr = trunc <1 x i64> %Shuff13 to <1 x i16>
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%Sl57 = select i1 %Cmp18, <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 -1, i32 -1>
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%Cmp58 = icmp uge <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %I56
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%L59 = load i8* %0
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store <1 x double> zeroinitializer, <1 x double>* %A2
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%E60 = extractelement <4 x i32> zeroinitializer, i32 0
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%Shuff61 = shufflevector <4 x i32> %I8, <4 x i32> %I8, <4 x i32> <i32 undef, i32 1, i32 undef, i32 undef>
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%I62 = insertelement <4 x i16> zeroinitializer, i16 %E12, i32 1
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%B63 = and <4 x i32> %Shuff61, <i32 -1, i32 -1, i32 -1, i32 -1>
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%PC = bitcast double* %A3 to i32*
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%Sl64 = select i1 %Cmp18, <4 x i32> %Shuff61, <4 x i32> %Shuff55
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%Cmp65 = icmp sgt i32 439732, %3
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br label %CF
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CF: ; preds = %CF79
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%L66 = load i32* %Sl10
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store i32 %E6, i32* %PC
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%E67 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2
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%Shuff68 = shufflevector <4 x i32> %Sl64, <4 x i32> %I8, <4 x i32> <i32 5, i32 undef, i32 1, i32 undef>
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%I69 = insertelement <4 x i16> %Shuff47, i16 %Sl, i32 3
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%B70 = sdiv <4 x i64> zeroinitializer, zeroinitializer
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%FC71 = sitofp i32 %L66 to double
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%Sl72 = select i1 %Cmp18, i64 %4, i64 %4
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%Cmp73 = icmp eq <4 x i64> zeroinitializer, %B70
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store i32 %B23, i32* %PC
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store i32 %3, i32* %PC
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store i32 %3, i32* %Sl10
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store i32 %L27, i32* %1
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store i32 0, i32* %PC
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ret void
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}
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