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exact/nsw/nuw shifts and have instcombine infer them when it can prove that the relevant properties are true for a given shift without them. Also, a variety of refactoring to use the new patternmatch logic thrown in for good luck. I believe that this takes care of a bunch of related code quality issues attached to PR8862. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125267 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
2.9 KiB
LLVM
88 lines
2.9 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
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define i32 @test1(i32 %x) {
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%tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
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%tmp.2 = xor i32 %tmp.1, -32768 ; <i32> [#uses=1]
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%tmp.3 = add i32 %tmp.2, 32768 ; <i32> [#uses=1]
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ret i32 %tmp.3
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; CHECK: @test1
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; CHECK: %sext = shl i32 %x, 16
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; CHECK: %tmp.3 = ashr exact i32 %sext, 16
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; CHECK: ret i32 %tmp.3
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}
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define i32 @test2(i32 %x) {
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%tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
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%tmp.2 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
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%tmp.3 = add i32 %tmp.2, -32768 ; <i32> [#uses=1]
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ret i32 %tmp.3
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; CHECK: @test2
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; CHECK: %sext = shl i32 %x, 16
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; CHECK: %tmp.3 = ashr exact i32 %sext, 16
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; CHECK: ret i32 %tmp.3
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}
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define i32 @test3(i16 %P) {
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%tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
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%tmp.4 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
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%tmp.5 = add i32 %tmp.4, -32768 ; <i32> [#uses=1]
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ret i32 %tmp.5
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; CHECK: @test3
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; CHECK: %tmp.5 = sext i16 %P to i32
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; CHECK: ret i32 %tmp.5
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}
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define i32 @test4(i16 %P) {
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%tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
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%tmp.4 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
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%tmp.5 = add i32 %tmp.4, -32768 ; <i32> [#uses=1]
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ret i32 %tmp.5
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; CHECK: @test4
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; CHECK: %tmp.5 = sext i16 %P to i32
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; CHECK: ret i32 %tmp.5
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}
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define i32 @test5(i32 %x) {
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%tmp.1 = and i32 %x, 255 ; <i32> [#uses=1]
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%tmp.2 = xor i32 %tmp.1, 128 ; <i32> [#uses=1]
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%tmp.3 = add i32 %tmp.2, -128 ; <i32> [#uses=1]
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ret i32 %tmp.3
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; CHECK: @test5
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; CHECK: %sext = shl i32 %x, 24
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; CHECK: %tmp.3 = ashr exact i32 %sext, 24
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; CHECK: ret i32 %tmp.3
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}
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define i32 @test6(i32 %x) {
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%tmp.2 = shl i32 %x, 16 ; <i32> [#uses=1]
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%tmp.4 = ashr i32 %tmp.2, 16 ; <i32> [#uses=1]
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ret i32 %tmp.4
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; CHECK: @test6
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; CHECK: %tmp.2 = shl i32 %x, 16
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; CHECK: %tmp.4 = ashr exact i32 %tmp.2, 16
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; CHECK: ret i32 %tmp.4
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}
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define i32 @test7(i16 %P) {
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%tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
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%sext1 = shl i32 %tmp.1, 16 ; <i32> [#uses=1]
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%tmp.5 = ashr i32 %sext1, 16 ; <i32> [#uses=1]
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ret i32 %tmp.5
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; CHECK: @test7
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; CHECK: %tmp.5 = sext i16 %P to i32
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; CHECK: ret i32 %tmp.5
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}
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define i32 @test8(i32 %x) nounwind readnone {
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entry:
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%shr = lshr i32 %x, 5 ; <i32> [#uses=1]
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%xor = xor i32 %shr, 67108864 ; <i32> [#uses=1]
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%sub = add i32 %xor, -67108864 ; <i32> [#uses=1]
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ret i32 %sub
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; CHECK: @test8
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; CHECK: %shr = ashr i32 %x, 5
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; CHECK: ret i32 %shr
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}
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