mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
95b9766fea
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941 91177308-0d34-0410-b5e6-96231b3b80d8
105 lines
4.4 KiB
ArmAsm
105 lines
4.4 KiB
ArmAsm
@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
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@ XFAIL: *
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@ FIXME: We cannot currently test the following instructions, which are
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@ currently marked as for-disassembly only in the .td files:
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@ - VCEQz
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@ - VCGEz, VCLEz
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@ - VCGTz, VCLTz
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@ CHECK: vceq.i8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf3]
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vceq.i8 d16, d16, d17
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@ CHECK: vceq.i16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf3]
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vceq.i16 d16, d16, d17
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@ CHECK: vceq.i32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf3]
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vceq.i32 d16, d16, d17
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@ CHECK: vceq.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf2]
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vceq.f32 d16, d16, d17
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@ CHECK: vceq.i8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf3]
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vceq.i8 q8, q8, q9
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@ CHECK: vceq.i16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf3]
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vceq.i16 q8, q8, q9
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@ CHECK: vceq.i32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf3]
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vceq.i32 q8, q8, q9
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@ CHECK: vceq.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf2]
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vceq.f32 q8, q8, q9
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@ CHECK: vcge.s8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf2]
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vcge.s8 d16, d16, d17
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@ CHECK: vcge.s16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf2]
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vcge.s16 d16, d16, d17
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@ CHECK: vcge.s32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf2]
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vcge.s32 d16, d16, d17
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@ CHECK: vcge.u8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf3]
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vcge.u8 d16, d16, d17
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@ CHECK: vcge.u16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf3]
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vcge.u16 d16, d16, d17
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@ CHECK: vcge.u32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf3]
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vcge.u32 d16, d16, d17
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@ CHECK: vcge.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf3]
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vcge.f32 d16, d16, d17
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@ CHECK: vcge.s8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf2]
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vcge.s8 q8, q8, q9
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@ CHECK: vcge.s16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf2]
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vcge.s16 q8, q8, q9
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@ CHECK: vcge.s32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf2]
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vcge.s32 q8, q8, q9
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@ CHECK: vcge.u8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf3]
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vcge.u8 q8, q8, q9
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@ CHECK: vcge.u16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf3]
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vcge.u16 q8, q8, q9
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@ CHECK: vcge.u32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf3]
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vcge.u32 q8, q8, q9
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@ CHECK: vcge.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf3]
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vcge.f32 q8, q8, q9
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@ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
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vacge.f32 d16, d16, d17
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@ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
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vacge.f32 q8, q8, q9
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@ CHECK: vcgt.s8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf2]
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vcgt.s8 d16, d16, d17
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@ CHECK: vcgt.s16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf2]
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vcgt.s16 d16, d16, d17
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@ CHECK: vcgt.s32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf2]
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vcgt.s32 d16, d16, d17
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@ CHECK: vcgt.u8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf3]
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vcgt.u8 d16, d16, d17
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@ CHECK: vcgt.u16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf3]
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vcgt.u16 d16, d16, d17
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@ CHECK: vcgt.u32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf3]
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vcgt.u32 d16, d16, d17
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@ CHECK: vcgt.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x60,0xf3]
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vcgt.f32 d16, d16, d17
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@ CHECK: vcgt.s8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf2]
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vcgt.s8 q8, q8, q9
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@ CHECK: vcgt.s16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf2]
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vcgt.s16 q8, q8, q9
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@ CHECK: vcgt.s32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf2]
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vcgt.s32 q8, q8, q9
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@ CHECK: vcgt.u8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf3]
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vcgt.u8 q8, q8, q9
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@ CHECK: vcgt.u16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf3]
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vcgt.u16 q8, q8, q9
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@ CHECK: vcgt.u32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf3]
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vcgt.u32 q8, q8, q9
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@ CHECK: vcgt.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x60,0xf3]
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vcgt.f32 q8, q8, q9
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@ CHECK: vacgt.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x60,0xf3]
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vacgt.f32 d16, d16, d17
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@ CHECK: vacgt.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x60,0xf3]
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vacgt.f32 q8, q8, q9
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@ CHECK: vtst.8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf2]
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vtst.8 d16, d16, d17
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@ CHECK: vtst.16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf2]
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vtst.16 d16, d16, d17
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@ CHECK: vtst.32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf2]
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vtst.32 d16, d16, d17
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@ CHECK: vtst.8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf2]
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vtst.8 q8, q8, q9
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@ CHECK: vtst.16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf2]
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vtst.16 q8, q8, q9
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@ CHECK: vtst.32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf2]
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vtst.32 q8, q8, q9
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