llvm-6502/lib/CodeGen/SelectionDAG
Reid Spencer 18c8b49e7d Use archive libraries instead of object files for VMCore, BCReader,
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 01:30:27 +00:00
..
DAGCombiner.cpp visitVBinOp: Can't fold divide by zero! 2006-05-31 06:08:35 +00:00
LegalizeDAG.cpp Change RET node to include signness information of the return values. e.g. 2006-05-26 23:09:09 +00:00
Makefile Use archive libraries instead of object files for VMCore, BCReader, 2006-06-01 01:30:27 +00:00
ScheduleDAG.cpp commuteInstruction() does not always create a new MI! 2006-05-31 18:03:39 +00:00
ScheduleDAGList.cpp When a priority_queue is empty, the behavior of top() operator is 2006-05-30 18:04:34 +00:00
ScheduleDAGRRList.cpp Make sure the register pressure reduction schedulers work for non-uniform 2006-05-30 18:05:39 +00:00
ScheduleDAGSimple.cpp Refactor a bunch of includes so that TargetMachine.h doesn't have to include 2006-05-12 06:33:49 +00:00
SelectionDAG.cpp Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo 2006-05-16 22:53:20 +00:00
SelectionDAGISel.cpp Make CALL node consistent with RET node. Signness of value has type MVT::i32 2006-05-26 23:13:20 +00:00
SelectionDAGPrinter.cpp print arbitrary constant pool entries 2006-03-05 09:38:03 +00:00
TargetLowering.cpp Another typo. Pointed out by Nate Begeman. 2006-05-17 18:22:14 +00:00