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This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
676 B
ArmAsm
26 lines
676 B
ArmAsm
# RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
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extrq $2, $3, %xmm0
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# CHECK: extrq $2, $3, %xmm0
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# CHECK: encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02]
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extrq %xmm1, %xmm0
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# CHECK: extrq %xmm1, %xmm0
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# CHECK: encoding: [0x66,0x0f,0x79,0xc1]
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insertq $6, $5, %xmm1, %xmm0
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# CHECK: insertq $6, $5, %xmm1, %xmm0
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# CHECK: encoding: [0xf2,0x0f,0x78,0xc1,0x05,0x06]
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insertq %xmm1, %xmm0
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# CHECK: insertq %xmm1, %xmm0
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# CHECK: encoding: [0xf2,0x0f,0x79,0xc1]
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movntsd %xmm0, (%rdi)
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# CHECK: movntsd %xmm0, (%rdi)
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# CHECK: encoding: [0xf2,0x0f,0x2b,0x07]
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movntss %xmm0, (%rdi)
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# CHECK: movntss %xmm0, (%rdi)
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# CHECK: encoding: [0xf3,0x0f,0x2b,0x07]
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