llvm-6502/test/CodeGen
Renato Golin 18e5ce0188 Fix ARM triple parsing
The triple parser should only accept existing architecture names
when the triple starts with armv, armebv, thumbv or thumbebv.

Patch by Gabor Ballabas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222129 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 14:08:57 +00:00
..
AArch64 [FastISel][AArch64] Don't bail during simple GEP instruction selection. 2014-11-13 20:50:44 +00:00
ARM Fix ARM triple parsing 2014-11-17 14:08:57 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Handle ctor/init_array initialization. 2014-11-03 14:56:05 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips First stage of call lowering for Mips fast-isel 2014-11-13 23:37:45 +00:00
MSP430
NVPTX [NVPTX] Add NVPTXLowerStructArgs pass 2014-11-05 18:19:30 +00:00
PowerPC [PowerPC] Add VSX builtins for vec_div 2014-11-14 12:10:40 +00:00
R600 R600: Permute operands when selecting legacy min/max 2014-11-15 05:02:57 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb [Thumb1] Re-write emitThumbRegPlusImmediate 2014-11-17 11:18:10 +00:00
Thumb2 ARM: allow constpool entry to be moved to the user's block in all cases. 2014-11-13 17:58:53 +00:00
X86 Fix CR/LF line endings in test case. 2014-11-17 08:00:45 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00