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Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.9 KiB
C++
56 lines
1.9 KiB
C++
//===-- PIC16TargetMachine.cpp - Define TargetMachine for PIC16 -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Top-level implementation for the PIC16 target.
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//
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//===----------------------------------------------------------------------===//
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#include "PIC16.h"
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#include "PIC16MCAsmInfo.h"
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#include "PIC16TargetMachine.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializePIC16Target() {
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// Register the target. Curretnly the codegen works for
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// enhanced pic16 mid-range.
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RegisterTargetMachine<PIC16TargetMachine> X(ThePIC16Target);
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RegisterAsmInfo<PIC16MCAsmInfo> A(ThePIC16Target);
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}
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// PIC16TargetMachine - Enhanced PIC16 mid-range Machine. May also represent
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// a Traditional Machine if 'Trad' is true.
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PIC16TargetMachine::PIC16TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS, bool Trad)
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: LLVMTargetMachine(T, TT),
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Subtarget(TT, FS, Trad),
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DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8"),
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InstrInfo(*this), TLInfo(*this), TSInfo(*this),
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FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0) { }
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bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Install an instruction selector.
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PM.add(createPIC16ISelDag(*this));
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return false;
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}
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bool PIC16TargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createPIC16MemSelOptimizerPass());
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return true; // -print-machineinstr should print after this.
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}
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