llvm-6502/test/CodeGen
Hal Finkel 6a34916fbf [PowerPC] Fix rlwimi isel when mask is not constant
We had been using the known-zero values of the operand of the or to construct
the mask for an rlwimi; this is not quite correct, but fine when the mask is
constant. When the mask is constant, then the known zeros of the operand must
be a superset of the zeros in the mask. However, when the mask is not a
constant, then there might be bits in the operand that are not known to be zero
that, at runtime, might be zero in the mask. Therefore, we check that any bits
not known to be zero *are* known to be one in the mask. Otherwise, we can't
fold the mask with the or and shift.

This was revealed as a miscompile of
MultiSource/Benchmarks/BitBench/drop3/drop3 when I started experimenting with
constant hoisting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206136 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-13 17:10:58 +00:00
..
AArch64
ARM Add extra checks to mvn.ll test to prevent the "f1" check from matching 2014-04-12 04:47:04 +00:00
ARM64 Add the ability to use GEPs for address sinking in CGP 2014-04-12 00:59:48 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] Fix rlwimi isel when mask is not constant 2014-04-13 17:10:58 +00:00
R600
SPARC
SystemZ Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
Thumb
Thumb2
X86 Add the ability to use GEPs for address sinking in CGP 2014-04-12 00:59:48 +00:00
XCore