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https://github.com/c64scene-ar/llvm-6502.git
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1911fd4f85
This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.4 KiB
C++
73 lines
2.4 KiB
C++
//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "SparcTargetMachine.h"
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#include "Sparc.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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// Register the target.
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RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
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}
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/// SparcTargetMachine ctor - Create an ILP32 architecture model
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///
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SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
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: DataLayout("E-p:32:32"),
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Subtarget(M, FS), InstrInfo(Subtarget),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
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}
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unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
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return 20;
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if (M.getEndianness() == Module::BigEndian &&
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M.getPointerSize() == Module::Pointer32)
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#ifdef __sparc__
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return 20; // BE/32 ==> Prefer sparc on sparc
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#else
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return 5; // BE/32 ==> Prefer ppc elsewhere
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#endif
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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return 0;
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}
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bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
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PM.add(createSparcISelDag(*this));
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return false;
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}
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/// addPreEmitPass - This pass may be implemented by targets that want to run
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/// passes immediately before machine code is emitted. This should return
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/// true if -print-machineinstrs should print out the code after the passes.
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bool SparcTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
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PM.add(createSparcFPMoverPass(*this));
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PM.add(createSparcDelaySlotFillerPass(*this));
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return true;
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}
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bool SparcTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
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std::ostream &Out) {
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// Output assembly language.
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PM.add(createSparcCodePrinterPass(Out, *this));
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return false;
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}
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