llvm-6502/test/MC/Disassembler
Mihai Popa 2248cf5906 This is a simple patch that changes RRX and RRXS to accept all registers as operands.
According to the ARM reference manual, RRX(S) have defined encodings for lr, pc and sp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183307 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 13:23:51 +00:00
..
AArch64 AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00
ARM This is a simple patch that changes RRX and RRXS to accept all registers as operands. 2013-06-05 13:23:51 +00:00
MBlaze
Mips [mips] DSP-ASE move from HI/LO register instructions. 2013-04-18 00:52:44 +00:00
SystemZ [SystemZ] Immediate compare-and-branch support 2013-05-29 11:58:52 +00:00
X86 Add CLAC/STAC instruction encoding/decoding support 2013-04-11 04:52:28 +00:00
XCore [XCore] Add LDAPB instructions. 2013-05-05 13:36:53 +00:00