llvm-6502/test/CodeGen/Mips/hf1_body.ll
Simon Atanasyan c5e99819f4 [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 12:20:17 +00:00

22 lines
616 B
LLVM

; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=picfp16
@x = external global float
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
%0 = load float* %p.addr, align 4
store float %0, float* @x, align 4
ret void
}
; picfp16: .ent __fn_stub_v_sf
; picfp16: .cpload $25
; picfp16: .set reorder
; picfp16: .reloc 0,R_MIPS_NONE,v_sf
; picfp16: la $25,$__fn_local_v_sf
; picfp16: mfc1 $4,$f12
; picfp16: jr $25
; picfp16: .end __fn_stub_v_sf