mirror of
https://github.com/c64scene-ar/llvm-6502.git
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199f58a198
- added mask types v8i1 and v16i1 to possible function parameters - enabled passing 512-bit vectors in standard CC - added a test for KNL intel_ocl_bi conventions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229482 91177308-0d34-0410-b5e6-96231b3b80d8
105 lines
3.7 KiB
LLVM
105 lines
3.7 KiB
LLVM
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=knl | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=knl | FileCheck -check-prefix=WIN64 %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck -check-prefix=X64 %s
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declare <16 x float> @func_float16_ptr(<16 x float>, <16 x float> *)
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declare <16 x float> @func_float16(<16 x float>, <16 x float>)
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declare i32 @func_int(i32, i32)
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; WIN64-LABEL: testf16_inp
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; WIN64: vaddps {{.*}}, {{%zmm[0-1]}}
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; WIN64: leaq {{.*}}(%rsp), %rcx
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; WIN64: call
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; WIN64: ret
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; X32-LABEL: testf16_inp
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; X32: vaddps {{.*}}, {{%zmm[0-1]}}
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; X32: movl %eax, (%esp)
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; X32: call
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; X32: ret
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; X64-LABEL: testf16_inp
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; X64: vaddps {{.*}}, {{%zmm[0-1]}}
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; X64: leaq {{.*}}(%rsp), %rdi
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; X64: call
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; X64: ret
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;test calling conventions - input parameters
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define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
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%y = alloca <16 x float>, align 16
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%x = fadd <16 x float> %a, %b
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%1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
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%2 = load <16 x float>* %y, align 16
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%3 = fadd <16 x float> %2, %1
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ret <16 x float> %3
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}
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;test calling conventions - preserved registers
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; preserved zmm16-
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; WIN64-LABEL: testf16_regs
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; WIN64: call
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; WIN64: vaddps %zmm16, %zmm0, %zmm0
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; WIN64: ret
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; preserved zmm16-
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; X64-LABEL: testf16_regs
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; X64: call
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; X64: vaddps %zmm16, %zmm0, %zmm0
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; X64: ret
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define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
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%y = alloca <16 x float>, align 16
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%x = fadd <16 x float> %a, %b
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%1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
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%2 = load <16 x float>* %y, align 16
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%3 = fadd <16 x float> %1, %b
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%4 = fadd <16 x float> %2, %3
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ret <16 x float> %4
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}
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; test calling conventions - prolog and epilog
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; WIN64-LABEL: test_prolog_epilog
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; WIN64: vmovups %zmm21, {{.*(%rbp).*}} # 64-byte Spill
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; WIN64: vmovups %zmm6, {{.*(%rbp).*}} # 64-byte Spill
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; WIN64: call
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; WIN64: vmovups {{.*(%rbp).*}}, %zmm6 # 64-byte Reload
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; WIN64: vmovups {{.*(%rbp).*}}, %zmm21 # 64-byte Reload
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; X64-LABEL: test_prolog_epilog
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; X64: kmovw %k7, {{.*}}(%rsp) ## 8-byte Folded Spill
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; X64: kmovw %k6, {{.*}}(%rsp) ## 8-byte Folded Spill
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; X64: kmovw %k5, {{.*}}(%rsp) ## 8-byte Folded Spill
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; X64: kmovw %k4, {{.*}}(%rsp) ## 8-byte Folded Spill
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; X64: vmovups %zmm31, {{.*}}(%rsp) ## 64-byte Spill
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; X64: vmovups %zmm16, {{.*}}(%rsp) ## 64-byte Spill
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; X64: call
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; X64: vmovups {{.*}}(%rsp), %zmm16 ## 64-byte Reload
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; X64: vmovups {{.*}}(%rsp), %zmm31 ## 64-byte Reload
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define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {
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%c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)
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ret <16 x float> %c
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}
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declare <16 x float> @func_float16_mask(<16 x float>, <16 x i1>)
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; X64-LABEL: testf16_inp_mask
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; X64: kmovw %edi, %k1
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; X64: call
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define <16 x float> @testf16_inp_mask(<16 x float> %a, i16 %mask) {
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%imask = bitcast i16 %mask to <16 x i1>
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%1 = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1> %imask)
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ret <16 x float> %1
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}
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; X64-LABEL: test_prolog_epilog_with_mask
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; X64: kxorw %k{{.*}}, %k{{.*}}, %k1
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; X64: call
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define intel_ocl_bicc <16 x float> @test_prolog_epilog_with_mask(<16 x float> %a, <16 x i32> %x1, <16 x i32>%x2, <16 x i1> %mask) nounwind {
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%cmp_res = icmp eq <16 x i32>%x1, %x2
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%mask1 = xor <16 x i1> %cmp_res, %mask
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%c = call intel_ocl_bicc <16 x float> @func_float16_mask(<16 x float> %a, <16 x i1>%mask1)
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ret <16 x float> %c
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} |