mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
a493b7786a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205865 91177308-0d34-0410-b5e6-96231b3b80d8
523 lines
12 KiB
Plaintext
523 lines
12 KiB
Plaintext
# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
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#==---------------------------------------------------------------------------==
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# Add/Subtract with carry/borrow
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#==---------------------------------------------------------------------------==
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0x41 0x00 0x03 0x1a
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0x41 0x00 0x03 0x9a
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0x85 0x00 0x03 0x3a
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0x85 0x00 0x03 0xba
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# CHECK: adc w1, w2, w3
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# CHECK: adc x1, x2, x3
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# CHECK: adcs w5, w4, w3
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# CHECK: adcs x5, x4, x3
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0x41 0x00 0x03 0x5a
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0x41 0x00 0x03 0xda
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0x41 0x00 0x03 0x7a
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0x41 0x00 0x03 0xfa
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# CHECK: sbc w1, w2, w3
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# CHECK: sbc x1, x2, x3
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# CHECK: sbcs w1, w2, w3
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# CHECK: sbcs x1, x2, x3
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#==---------------------------------------------------------------------------==
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# Add/Subtract with (optionally shifted) immediate
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#==---------------------------------------------------------------------------==
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0x83 0x00 0x10 0x11
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0x83 0x00 0x10 0x91
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# CHECK: add w3, w4, #1024
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# CHECK: add x3, x4, #1024
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0x83 0x00 0x50 0x11
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0x83 0x00 0x40 0x11
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0x83 0x00 0x50 0x91
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0x83 0x00 0x40 0x91
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0xff 0x83 0x00 0x91
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# CHECK: add w3, w4, #4194304
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# CHECK: add x3, x4, #4194304
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# CHECK: add x3, x4, #0, lsl #12
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# CHECK: add sp, sp, #32
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0x83 0x00 0x10 0x31
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0x83 0x00 0x50 0x31
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0x83 0x00 0x10 0xb1
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0x83 0x00 0x50 0xb1
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# CHECK: adds w3, w4, #1024
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# CHECK: adds w3, w4, #4194304
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# CHECK: adds x3, x4, #1024
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# CHECK: adds x3, x4, #4194304
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0x83 0x00 0x10 0x51
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0x83 0x00 0x50 0x51
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0x83 0x00 0x10 0xd1
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0x83 0x00 0x50 0xd1
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0xff 0x83 0x00 0xd1
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# CHECK: sub w3, w4, #1024
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# CHECK: sub w3, w4, #4194304
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# CHECK: sub x3, x4, #1024
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# CHECK: sub x3, x4, #4194304
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# CHECK: sub sp, sp, #32
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0x83 0x00 0x10 0x71
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0x83 0x00 0x50 0x71
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0x83 0x00 0x10 0xf1
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0x83 0x00 0x50 0xf1
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# CHECK: subs w3, w4, #1024
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# CHECK: subs w3, w4, #4194304
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# CHECK: subs x3, x4, #1024
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# CHECK: subs x3, x4, #4194304
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#==---------------------------------------------------------------------------==
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# Add/Subtract register with (optional) shift
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#==---------------------------------------------------------------------------==
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0xac 0x01 0x0e 0x0b
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0xac 0x01 0x0e 0x8b
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0xac 0x31 0x0e 0x0b
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0xac 0x31 0x0e 0x8b
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0xac 0x29 0x4e 0x0b
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0xac 0x29 0x4e 0x8b
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0xac 0x1d 0x8e 0x0b
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0xac 0x9d 0x8e 0x8b
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# CHECK: add w12, w13, w14
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# CHECK: add x12, x13, x14
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# CHECK: add w12, w13, w14, lsl #12
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# CHECK: add x12, x13, x14, lsl #12
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# CHECK: add w12, w13, w14, lsr #10
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# CHECK: add x12, x13, x14, lsr #10
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# CHECK: add w12, w13, w14, asr #7
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# CHECK: add x12, x13, x14, asr #39
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0xac 0x01 0x0e 0x4b
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0xac 0x01 0x0e 0xcb
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0xac 0x31 0x0e 0x4b
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0xac 0x31 0x0e 0xcb
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0xac 0x29 0x4e 0x4b
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0xac 0x29 0x4e 0xcb
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0xac 0x1d 0x8e 0x4b
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0xac 0x9d 0x8e 0xcb
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# CHECK: sub w12, w13, w14
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# CHECK: sub x12, x13, x14
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# CHECK: sub w12, w13, w14, lsl #12
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# CHECK: sub x12, x13, x14, lsl #12
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# CHECK: sub w12, w13, w14, lsr #10
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# CHECK: sub x12, x13, x14, lsr #10
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# CHECK: sub w12, w13, w14, asr #7
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# CHECK: sub x12, x13, x14, asr #39
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0xac 0x01 0x0e 0x2b
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0xac 0x01 0x0e 0xab
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0xac 0x31 0x0e 0x2b
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0xac 0x31 0x0e 0xab
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0xac 0x29 0x4e 0x2b
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0xac 0x29 0x4e 0xab
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0xac 0x1d 0x8e 0x2b
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0xac 0x9d 0x8e 0xab
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# CHECK: adds w12, w13, w14
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# CHECK: adds x12, x13, x14
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# CHECK: adds w12, w13, w14, lsl #12
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# CHECK: adds x12, x13, x14, lsl #12
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# CHECK: adds w12, w13, w14, lsr #10
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# CHECK: adds x12, x13, x14, lsr #10
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# CHECK: adds w12, w13, w14, asr #7
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# CHECK: adds x12, x13, x14, asr #39
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0xac 0x01 0x0e 0x6b
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0xac 0x01 0x0e 0xeb
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0xac 0x31 0x0e 0x6b
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0xac 0x31 0x0e 0xeb
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0xac 0x29 0x4e 0x6b
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0xac 0x29 0x4e 0xeb
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0xac 0x1d 0x8e 0x6b
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0xac 0x9d 0x8e 0xeb
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# CHECK: subs w12, w13, w14
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# CHECK: subs x12, x13, x14
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# CHECK: subs w12, w13, w14, lsl #12
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# CHECK: subs x12, x13, x14, lsl #12
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# CHECK: subs w12, w13, w14, lsr #10
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# CHECK: subs x12, x13, x14, lsr #10
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# CHECK: subs w12, w13, w14, asr #7
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# CHECK: subs x12, x13, x14, asr #39
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#==---------------------------------------------------------------------------==
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# Add/Subtract with (optional) extend
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#==---------------------------------------------------------------------------==
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0x41 0x00 0x23 0x0b
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0x41 0x20 0x23 0x0b
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0x41 0x40 0x23 0x0b
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0x41 0x60 0x23 0x0b
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0x41 0x80 0x23 0x0b
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0x41 0xa0 0x23 0x0b
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0x41 0xc0 0x23 0x0b
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0x41 0xe0 0x23 0x0b
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# CHECK: add w1, w2, w3, uxtb
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# CHECK: add w1, w2, w3, uxth
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# CHECK: add w1, w2, w3, uxtw
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# CHECK: add w1, w2, w3, uxtx
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# CHECK: add w1, w2, w3, sxtb
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# CHECK: add w1, w2, w3, sxth
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# CHECK: add w1, w2, w3, sxtw
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# CHECK: add w1, w2, w3, sxtx
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0x41 0x00 0x23 0x8b
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0x41 0x20 0x23 0x8b
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0x41 0x40 0x23 0x8b
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0x41 0x80 0x23 0x8b
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0x41 0xa0 0x23 0x8b
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0x41 0xc0 0x23 0x8b
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# CHECK: add x1, x2, w3, uxtb
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# CHECK: add x1, x2, w3, uxth
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# CHECK: add x1, x2, w3, uxtw
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# CHECK: add x1, x2, w3, sxtb
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# CHECK: add x1, x2, w3, sxth
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# CHECK: add x1, x2, w3, sxtw
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0xe1 0x43 0x23 0x0b
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0xe1 0x43 0x23 0x0b
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0x5f 0x60 0x23 0x8b
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0x5f 0x60 0x23 0x8b
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# CHECK: add w1, wsp, w3
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# CHECK: add w1, wsp, w3
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# CHECK: add sp, x2, x3
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# CHECK: add sp, x2, x3
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0x41 0x00 0x23 0x4b
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0x41 0x20 0x23 0x4b
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0x41 0x40 0x23 0x4b
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0x41 0x60 0x23 0x4b
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0x41 0x80 0x23 0x4b
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0x41 0xa0 0x23 0x4b
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0x41 0xc0 0x23 0x4b
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0x41 0xe0 0x23 0x4b
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# CHECK: sub w1, w2, w3, uxtb
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# CHECK: sub w1, w2, w3, uxth
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# CHECK: sub w1, w2, w3, uxtw
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# CHECK: sub w1, w2, w3, uxtx
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# CHECK: sub w1, w2, w3, sxtb
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# CHECK: sub w1, w2, w3, sxth
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# CHECK: sub w1, w2, w3, sxtw
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# CHECK: sub w1, w2, w3, sxtx
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0x41 0x00 0x23 0xcb
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0x41 0x20 0x23 0xcb
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0x41 0x40 0x23 0xcb
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0x41 0x80 0x23 0xcb
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0x41 0xa0 0x23 0xcb
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0x41 0xc0 0x23 0xcb
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# CHECK: sub x1, x2, w3, uxtb
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# CHECK: sub x1, x2, w3, uxth
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# CHECK: sub x1, x2, w3, uxtw
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# CHECK: sub x1, x2, w3, sxtb
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# CHECK: sub x1, x2, w3, sxth
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# CHECK: sub x1, x2, w3, sxtw
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0xe1 0x43 0x23 0x4b
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0xe1 0x43 0x23 0x4b
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0x5f 0x60 0x23 0xcb
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0x5f 0x60 0x23 0xcb
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# CHECK: sub w1, wsp, w3
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# CHECK: sub w1, wsp, w3
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# CHECK: sub sp, x2, x3
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# CHECK: sub sp, x2, x3
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0x41 0x00 0x23 0x2b
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0x41 0x20 0x23 0x2b
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0x41 0x40 0x23 0x2b
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0x41 0x60 0x23 0x2b
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0x41 0x80 0x23 0x2b
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0x41 0xa0 0x23 0x2b
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0x41 0xc0 0x23 0x2b
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0x41 0xe0 0x23 0x2b
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# CHECK: adds w1, w2, w3, uxtb
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# CHECK: adds w1, w2, w3, uxth
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# CHECK: adds w1, w2, w3, uxtw
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# CHECK: adds w1, w2, w3, uxtx
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# CHECK: adds w1, w2, w3, sxtb
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# CHECK: adds w1, w2, w3, sxth
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# CHECK: adds w1, w2, w3, sxtw
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# CHECK: adds w1, w2, w3, sxtx
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0x41 0x00 0x23 0xab
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0x41 0x20 0x23 0xab
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0x41 0x40 0x23 0xab
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0x41 0x80 0x23 0xab
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0x41 0xa0 0x23 0xab
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0x41 0xc0 0x23 0xab
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# CHECK: adds x1, x2, w3, uxtb
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# CHECK: adds x1, x2, w3, uxth
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# CHECK: adds x1, x2, w3, uxtw
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# CHECK: adds x1, x2, w3, sxtb
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# CHECK: adds x1, x2, w3, sxth
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# CHECK: adds x1, x2, w3, sxtw
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0xe1 0x43 0x23 0x2b
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0xe1 0x43 0x23 0x2b
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# CHECK: adds w1, wsp, w3
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# CHECK: adds w1, wsp, w3
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0x41 0x00 0x23 0x6b
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0x41 0x20 0x23 0x6b
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0x41 0x40 0x23 0x6b
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0x41 0x60 0x23 0x6b
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0x41 0x80 0x23 0x6b
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0x41 0xa0 0x23 0x6b
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0x41 0xc0 0x23 0x6b
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0x41 0xe0 0x23 0x6b
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# CHECK: subs w1, w2, w3, uxtb
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# CHECK: subs w1, w2, w3, uxth
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# CHECK: subs w1, w2, w3, uxtw
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# CHECK: subs w1, w2, w3, uxtx
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# CHECK: subs w1, w2, w3, sxtb
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# CHECK: subs w1, w2, w3, sxth
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# CHECK: subs w1, w2, w3, sxtw
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# CHECK: subs w1, w2, w3, sxtx
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0x41 0x00 0x23 0xeb
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0x41 0x20 0x23 0xeb
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0x41 0x40 0x23 0xeb
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0x41 0x80 0x23 0xeb
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0x41 0xa0 0x23 0xeb
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0x41 0xc0 0x23 0xeb
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# CHECK: subs x1, x2, w3, uxtb
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# CHECK: subs x1, x2, w3, uxth
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# CHECK: subs x1, x2, w3, uxtw
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# CHECK: subs x1, x2, w3, sxtb
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# CHECK: subs x1, x2, w3, sxth
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# CHECK: subs x1, x2, w3, sxtw
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0xe1 0x43 0x23 0x6b
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0xe1 0x43 0x23 0x6b
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# CHECK: subs w1, wsp, w3
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# CHECK: subs w1, wsp, w3
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0x1f 0x41 0x28 0xeb
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0x3f 0x41 0x28 0x6b
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0xff 0x43 0x28 0x6b
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0xff 0x43 0x28 0xeb
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# CHECK: cmp x8, w8, uxtw
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# CHECK: cmp w9, w8, uxtw
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# CHECK: cmp wsp, w8
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# CHECK: cmp sp, w8
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0x3f 0x41 0x28 0x4b
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0xe1 0x43 0x28 0x4b
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0xff 0x43 0x28 0x4b
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0x3f 0x41 0x28 0xcb
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0xe1 0x43 0x28 0xcb
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0xff 0x43 0x28 0xcb
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0xe1 0x43 0x28 0x6b
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0xe1 0x43 0x28 0xeb
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# CHECK: sub wsp, w9, w8
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# CHECK: sub w1, wsp, w8
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# CHECK: sub wsp, wsp, w8
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# CHECK: sub sp, x9, w8
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# CHECK: sub x1, sp, w8
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# CHECK: sub sp, sp, w8
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# CHECK: subs w1, wsp, w8
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# CHECK: subs x1, sp, w8
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#==---------------------------------------------------------------------------==
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# Signed/Unsigned divide
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#==---------------------------------------------------------------------------==
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0x41 0x0c 0xc3 0x1a
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0x41 0x0c 0xc3 0x9a
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0x41 0x08 0xc3 0x1a
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0x41 0x08 0xc3 0x9a
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# CHECK: sdiv w1, w2, w3
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# CHECK: sdiv x1, x2, x3
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# CHECK: udiv w1, w2, w3
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# CHECK: udiv x1, x2, x3
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#==---------------------------------------------------------------------------==
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# Variable shifts
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#==---------------------------------------------------------------------------==
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0x41 0x28 0xc3 0x1a
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# CHECK: asrv w1, w2, w3
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0x41 0x28 0xc3 0x9a
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# CHECK: asrv x1, x2, x3
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0x41 0x20 0xc3 0x1a
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# CHECK: lslv w1, w2, w3
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0x41 0x20 0xc3 0x9a
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# CHECK: lslv x1, x2, x3
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0x41 0x24 0xc3 0x1a
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# CHECK: lsrv w1, w2, w3
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0x41 0x24 0xc3 0x9a
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# CHECK: lsrv x1, x2, x3
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0x41 0x2c 0xc3 0x1a
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# CHECK: rorv w1, w2, w3
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0x41 0x2c 0xc3 0x9a
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# CHECK: rorv x1, x2, x3
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#==---------------------------------------------------------------------------==
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# One operand instructions
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#==---------------------------------------------------------------------------==
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0x41 0x14 0xc0 0x5a
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# CHECK: cls w1, w2
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0x41 0x14 0xc0 0xda
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# CHECK: cls x1, x2
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0x41 0x10 0xc0 0x5a
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# CHECK: clz w1, w2
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0x41 0x10 0xc0 0xda
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# CHECK: clz x1, x2
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0x41 0x00 0xc0 0x5a
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# CHECK: rbit w1, w2
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0x41 0x00 0xc0 0xda
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# CHECK: rbit x1, x2
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0x41 0x08 0xc0 0x5a
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# CHECK: rev w1, w2
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0x41 0x0c 0xc0 0xda
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# CHECK: rev x1, x2
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0x41 0x04 0xc0 0x5a
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# CHECK: rev16 w1, w2
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0x41 0x04 0xc0 0xda
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# CHECK: rev16 x1, x2
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0x41 0x08 0xc0 0xda
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# CHECK: rev32 x1, x2
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#==---------------------------------------------------------------------------==
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# 6.6.1 Multiply-add instructions
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#==---------------------------------------------------------------------------==
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0x41 0x10 0x03 0x1b
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0x41 0x10 0x03 0x9b
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0x41 0x90 0x03 0x1b
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0x41 0x90 0x03 0x9b
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0x41 0x10 0x23 0x9b
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0x41 0x90 0x23 0x9b
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0x41 0x10 0xa3 0x9b
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0x41 0x90 0xa3 0x9b
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# CHECK: madd w1, w2, w3, w4
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# CHECK: madd x1, x2, x3, x4
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# CHECK: msub w1, w2, w3, w4
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# CHECK: msub x1, x2, x3, x4
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# CHECK: smaddl x1, w2, w3, x4
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# CHECK: smsubl x1, w2, w3, x4
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# CHECK: umaddl x1, w2, w3, x4
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# CHECK: umsubl x1, w2, w3, x4
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#==---------------------------------------------------------------------------==
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# Multiply-high instructions
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#==---------------------------------------------------------------------------==
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0x41 0x7c 0x43 0x9b
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0x41 0x7c 0xc3 0x9b
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# CHECK: smulh x1, x2, x3
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# CHECK: umulh x1, x2, x3
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#==---------------------------------------------------------------------------==
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# Move immediate instructions
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#==---------------------------------------------------------------------------==
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0x20 0x00 0x80 0x52
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0x20 0x00 0x80 0xd2
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0x20 0x00 0xa0 0x52
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0x20 0x00 0xa0 0xd2
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# CHECK: movz w0, #1
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# CHECK: movz x0, #1
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# CHECK: movz w0, #1, lsl #16
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# CHECK: movz x0, #1, lsl #16
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0x40 0x00 0x80 0x12
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0x40 0x00 0x80 0x92
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0x40 0x00 0xa0 0x12
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0x40 0x00 0xa0 0x92
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# CHECK: movn w0, #2
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# CHECK: movn x0, #2
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# CHECK: movn w0, #2, lsl #16
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# CHECK: movn x0, #2, lsl #16
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0x20 0x00 0x80 0x72
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0x20 0x00 0x80 0xf2
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0x20 0x00 0xa0 0x72
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0x20 0x00 0xa0 0xf2
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# CHECK: movk w0, #1
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# CHECK: movk x0, #1
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# CHECK: movk w0, #1, lsl #16
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# CHECK: movk x0, #1, lsl #16
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#==---------------------------------------------------------------------------==
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# Conditionally set flags instructions
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#==---------------------------------------------------------------------------==
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0x1f 0x00 0x00 0x31
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# CHECK: cmn w0, #0
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0x1f 0xfc 0x03 0xb1
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# CHECK: x0, #255
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0x23 0x08 0x42 0x3a
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# CHECK: ccmn w1, #2, #3, eq
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0x23 0x08 0x42 0xba
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# CHECK: ccmn x1, #2, #3, eq
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0x23 0x08 0x42 0x7a
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# CHECK: ccmp w1, #2, #3, eq
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0x23 0x08 0x42 0xfa
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# CHECK: ccmp x1, #2, #3, eq
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0x23 0x00 0x42 0x3a
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# CHECK: ccmn w1, w2, #3, eq
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0x23 0x00 0x42 0xba
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# CHECK: ccmn x1, x2, #3, eq
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0x23 0x00 0x42 0x7a
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# CHECK: ccmp w1, w2, #3, eq
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0x23 0x00 0x42 0xfa
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# CHECK: ccmp x1, x2, #3, eq
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#==---------------------------------------------------------------------------==
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# Conditional select instructions
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#==---------------------------------------------------------------------------==
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0x41 0x00 0x83 0x1a
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# CHECK: csel w1, w2, w3, eq
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0x41 0x00 0x83 0x9a
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# CHECK: csel x1, x2, x3, eq
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0x41 0x04 0x83 0x1a
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# CHECK: csinc w1, w2, w3, eq
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0x41 0x04 0x83 0x9a
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# CHECK: csinc x1, x2, x3, eq
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0x41 0x00 0x83 0x5a
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# CHECK: csinv w1, w2, w3, eq
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0x41 0x00 0x83 0xda
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# CHECK: csinv x1, x2, x3, eq
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0x41 0x04 0x83 0x5a
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# CHECK: csneg w1, w2, w3, eq
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0x41 0x04 0x83 0xda
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# CHECK: csneg x1, x2, x3, eq
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